watchdog: aspeed: Add support for aspeed,reset-mask DT property
authorZev Weiss <zev@bewilderbeest.net>
Fri, 22 Sep 2023 10:42:34 +0000 (03:42 -0700)
committerWim Van Sebroeck <wim@linux-watchdog.org>
Sun, 29 Oct 2023 18:45:11 +0000 (19:45 +0100)
This property allows the device-tree to specify how the Aspeed
watchdog timer's reset mask register(s) should be set, so that
peripherals can be individually exempted from (or opted in to) being
reset when the watchdog timer expires.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20230922104231.1434-6-zev@bewilderbeest.net
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
drivers/watchdog/aspeed_wdt.c

index b72a858bbac70235a10a78ca10592d4932c627b2..b4773a6aaf8cc7218d9846fa354c68b7d18ed0b4 100644 (file)
@@ -79,6 +79,8 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
 #define   WDT_TIMEOUT_STATUS_BOOT_SECONDARY    BIT(1)
 #define WDT_CLEAR_TIMEOUT_STATUS       0x14
 #define   WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION    BIT(0)
+#define WDT_RESET_MASK1                0x1c
+#define WDT_RESET_MASK2                0x20
 
 /*
  * WDT_RESET_WIDTH controls the characteristics of the external pulse (if
@@ -402,6 +404,8 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
 
        if ((of_device_is_compatible(np, "aspeed,ast2500-wdt")) ||
                (of_device_is_compatible(np, "aspeed,ast2600-wdt"))) {
+               u32 reset_mask[2];
+               size_t nrstmask = of_device_is_compatible(np, "aspeed,ast2600-wdt") ? 2 : 1;
                u32 reg = readl(wdt->base + WDT_RESET_WIDTH);
 
                reg &= wdt->cfg->ext_pulse_width_mask;
@@ -419,6 +423,13 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
                        reg |= WDT_OPEN_DRAIN_MAGIC;
 
                writel(reg, wdt->base + WDT_RESET_WIDTH);
+
+               ret = of_property_read_u32_array(np, "aspeed,reset-mask", reset_mask, nrstmask);
+               if (!ret) {
+                       writel(reset_mask[0], wdt->base + WDT_RESET_MASK1);
+                       if (nrstmask > 1)
+                               writel(reset_mask[1], wdt->base + WDT_RESET_MASK2);
+               }
        }
 
        if (!of_property_read_u32(np, "aspeed,ext-pulse-duration", &duration)) {