ASoC: qcom: lpass-cpu: mark IRQ_CLEAR register as volatile and readable
authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Thu, 24 Jun 2021 09:21:53 +0000 (10:21 +0100)
committerMark Brown <broonie@kernel.org>
Thu, 24 Jun 2021 18:29:53 +0000 (19:29 +0100)
Currently IRQ_CLEAR register is marked as write-only, however using
regmap_update_bits on this register will have some side effects.
so mark IRQ_CLEAR register appropriately as readable and volatile.

Fixes: da0363f7bfd3 ("ASoC: qcom: Fix for DMA interrupt clear reg overwriting")
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210624092153.5771-1-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/qcom/lpass-cpu.c

index 4faae44b511807cd2ee3b927da306cdfb7c90467..3bd9eb3cc688b2623a13470a7684fd4719a15bb5 100644 (file)
@@ -525,6 +525,8 @@ static bool lpass_cpu_regmap_readable(struct device *dev, unsigned int reg)
                        return true;
 
        for (i = 0; i < v->irq_ports; ++i) {
+               if (reg == LPAIF_IRQCLEAR_REG(v, i))
+                       return true;
                if (reg == LPAIF_IRQEN_REG(v, i))
                        return true;
                if (reg == LPAIF_IRQSTAT_REG(v, i))
@@ -566,9 +568,12 @@ static bool lpass_cpu_regmap_volatile(struct device *dev, unsigned int reg)
        struct lpass_variant *v = drvdata->variant;
        int i;
 
-       for (i = 0; i < v->irq_ports; ++i)
+       for (i = 0; i < v->irq_ports; ++i) {
+               if (reg == LPAIF_IRQCLEAR_REG(v, i))
+                       return true;
                if (reg == LPAIF_IRQSTAT_REG(v, i))
                        return true;
+       }
 
        for (i = 0; i < v->rdma_channels; ++i)
                if (reg == LPAIF_RDMACURR_REG(v, i))