ARM: dts: qcom: add missing clock configuration for kpss-acc-v1

Add missing clock configuration by adding clocks, clock-names,
clock-output-names and #clock-cells bindings for each kpss-acc-v1
clock-controller to reflect Documentation schema.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-7-ansuelsmth@gmail.com

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 70d6ed1ac62c941d0402e07a1ed792fe8e26665f..920d318da2667269b7db53e0780b030d9fb3ee46 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -388,21 +388,37 @@
                acc0: clock-controller@2088000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu0_aux";
+                       #clock-cells = <0>;
                };
 
                acc1: clock-controller@2098000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu1_aux";
+                       #clock-cells = <0>;
                };
 
                acc2: clock-controller@20a8000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x020a8000 0x1000>, <0x02008000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu2_aux";
+                       #clock-cells = <0>;
                };
 
                acc3: clock-controller@20b8000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x020b8000 0x1000>, <0x02008000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu3_aux";
+                       #clock-cells = <0>;
                };
 
                saw0: power-controller@2089000 {

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index e45da8f01ba0c0924cfa0d23545de1b39d24cded..5a464f6de0b6307cea427702430eb6ec20699f08 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -579,6 +579,10 @@
                acc0: clock-controller@2088000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu0_aux";
+                       #clock-cells = <0>;
                };
 
                saw0: regulator@2089000 {
@@ -590,6 +594,10 @@
                acc1: clock-controller@2098000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu1_aux";
+                       #clock-cells = <0>;
                };
 
                saw1: regulator@2099000 {

diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index 026480efe8ec3de18fdcf2bd7ce16e2b996fb941..2a668cd535ccebb9f18c23ad8544190ba9b3f3e5 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -207,11 +207,19 @@
                acc0: clock-controller@2088000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu0_aux";
+                       #clock-cells = <0>;
                };
 
                acc1: clock-controller@2098000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu1_aux";
+                       #clock-cells = <0>;
                };
 
                saw0: regulator@2089000 {