#ifdef CONFIG_PPC_PSERIES
 extern int pseries_devicetree_update(s32 scope);
+extern void post_mobility_fixup(void);
 #endif
 
 #ifdef CONFIG_PPC_RTAS_DAEMON
 
        cacheinfo_sysfs_populate(cpu_id, cache);
 }
 
-#ifdef CONFIG_HOTPLUG_CPU /* functions needed for cpu offline */
+/* functions needed to remove cache entry for cpu offline or suspend/resume */
+
+#if (defined(CONFIG_PPC_PSERIES) && defined(CONFIG_SUSPEND)) || \
+    defined(CONFIG_HOTPLUG_CPU)
 
 static struct cache *cache_lookup_by_cpu(unsigned int cpu_id)
 {
        if (cache)
                cache_cpu_clear(cache, cpu_id);
 }
-#endif /* CONFIG_HOTPLUG_CPU */
+#endif /* (CONFIG_PPC_PSERIES && CONFIG_SUSPEND) || CONFIG_HOTPLUG_CPU */
 
 #include <asm/mmu.h>
 #include <asm/rtas.h>
 #include <asm/topology.h>
+#include "../../kernel/cacheinfo.h"
 
 static u64 stream_id;
 static struct device suspend_dev;
        return 0;
 }
 
+/**
+ * pseries_suspend_enable_irqs
+ *
+ * Post suspend configuration updates
+ *
+ **/
+static void pseries_suspend_enable_irqs(void)
+{
+       /*
+        * Update configuration which can be modified based on device tree
+        * changes during resume.
+        */
+       cacheinfo_cpu_offline(smp_processor_id());
+       post_mobility_fixup();
+       cacheinfo_cpu_online(smp_processor_id());
+}
+
 /**
  * pseries_suspend_enter - Final phase of hibernation
  *
                return rc;
 
        ppc_md.suspend_disable_cpu = pseries_suspend_cpu;
+       ppc_md.suspend_enable_irqs = pseries_suspend_enable_irqs;
        suspend_set_ops(&pseries_suspend_ops);
        return 0;
 }