target-mips: proper sign extension for 'SUBU rd, zero, rt'

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 2c163e0ca440f020f79cfc8a572b013e43fb00c5..7ecc9fdaf311753f925662a4124da52cf43b58ad 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1604,6 +1604,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
             tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
         } else if (rs == 0 && rt != 0) {
             tcg_gen_neg_tl(cpu_gpr[rd], cpu_gpr[rt]);
+            tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
         } else if (rs != 0 && rt == 0) {
             tcg_gen_mov_tl(cpu_gpr[rd], cpu_gpr[rs]);
         } else {