arm64: dts: visconti: Add PCIe host controller support for TMPV7708 SoC
authorNobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Tue, 7 Sep 2021 04:25:00 +0000 (13:25 +0900)
committerNobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Fri, 15 Oct 2021 22:09:41 +0000 (07:09 +0900)
Add PCIe node and fixed clock for PCIe in TMPV7708's dtsi,
and tmpv7708-rm-mbrc boards's dts.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20210907042500.1525771-1-nobuhiro1.iwamatsu@toshiba.co.jp
arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
arch/arm64/boot/dts/toshiba/tmpv7708.dtsi

index 29a4d9fc1e47194b8a1a04dffad8fccaaba66a04..9375b0faeea2f3ca35eb443c25293cdd87ad7c80 100644 (file)
@@ -76,3 +76,9 @@
 &pwm {
        status = "okay";
 };
+
+&pcie {
+       status = "okay";
+       clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;
+       clock-names = "ref", "core", "aux";
+};
index 4b4231ff43cfd2c3aa9becc5be76bd21f9eadb3f..5db9a012d6fc16e4fe4cd9287fe76661fcb5fec7 100644 (file)
                #clock-cells = <0>;
        };
 
+       clk25mhz: clk25mhz {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+               clock-output-names = "clk25mhz";
+       };
+
        clk125mhz: clk125mhz {
                compatible = "fixed-clock";
                clock-frequency = <125000000>;
                clock-output-names = "clk300mhz";
        };
 
+       clk600mhz: clk600mhz {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <600000000>;
+               clock-output-names = "clk600mhz";
+       };
+
+       extclk100mhz: extclk100mhz {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <100000000>;
+               clock-output-names = "extclk100mhz";
+       };
+
        wdt_clk: wdt-clk {
                compatible = "fixed-clock";
                clock-frequency = <150000000>;
                        #pwm-cells = <2>;
                        status = "disabled";
                };
+
+               pcie: pcie@28400000 {
+                       compatible = "toshiba,visconti-pcie";
+                       reg = <0x0 0x28400000 0x0 0x00400000>,
+                             <0x0 0x70000000 0x0 0x10000000>,
+                             <0x0 0x28050000 0x0 0x00010000>,
+                             <0x0 0x24200000 0x0 0x00002000>,
+                             <0x0 0x24162000 0x0 0x00001000>;
+                       reg-names  = "dbi", "config", "ulreg", "smu", "mpu";
+                       device_type = "pci";
+                       bus-range = <0x00 0xff>;
+                       num-lanes = <2>;
+                       num-viewport = <8>;
+
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000
+                                 0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>;
+                       interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "msi", "intr";
+                       interrupt-map-mask = <0 0 0 7>;
+                       interrupt-map =
+                               <0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
+                                0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
+                                0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
+                                0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+                       max-link-speed = <2>;
+                       status = "disabled";
+               };
        };
 };