net: ethernet: ti: ale: add support for mac-only mode

The new CPSW ALE version, available on TI K3 AM654/J721E SoCs family,
allows to switch any external port to MAC only mode. When MAC only mode
enabled this port be treated like a MAC port for the host. All traffic
received is only sent to the host. The host must direct traffic to this
port as the lookup engine will not send traffic to the ports with the
p0_maconly bit set and the p0_no_learn also set. If p0_maconly bit is set
and the p0_no_learn is not set, the host can send non-directed packets that
can be sent to the destination of a MacOnly port. It is also possible that
The host can broadcast to all ports including MacOnly ports in this mode.

This patch add ALE supprt for MAC only mode.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Murali Karicheri <m-karicheri2@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c
index 5815225c000c92f4a6e2f3e9a1aada69a5688641..719e7846127cf68b9408e27e38aa787cd52b7672 100644 (file)
--- a/drivers/net/ethernet/ti/cpsw_ale.c
+++ b/drivers/net/ethernet/ti/cpsw_ale.c
@@ -779,6 +779,22 @@ static struct ale_control_info ale_controls[ALE_NUM_CONTROLS] = {
                .port_shift     = 0,
                .bits           = 1,
        },
+       [ALE_PORT_MACONLY]      = {
+               .name           = "mac_only_port_mode",
+               .offset         = ALE_PORTCTL,
+               .port_offset    = 4,
+               .shift          = 11,
+               .port_shift     = 0,
+               .bits           = 1,
+       },
+       [ALE_PORT_MACONLY_CAF]  = {
+               .name           = "mac_only_port_caf",
+               .offset         = ALE_PORTCTL,
+               .port_offset    = 4,
+               .shift          = 13,
+               .port_shift     = 0,
+               .bits           = 1,
+       },
        [ALE_PORT_MCAST_LIMIT]  = {
                .name           = "mcast_limit",
                .offset         = ALE_PORTCTL,

diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h
index 70d0955c2652aeda3127d8b8c275927c4f41c430..eaca73c17ae7a89f92a153f2822014612969e889 100644 (file)
--- a/drivers/net/ethernet/ti/cpsw_ale.h
+++ b/drivers/net/ethernet/ti/cpsw_ale.h
@@ -62,6 +62,8 @@ enum cpsw_ale_control {
        ALE_PORT_UNKNOWN_MCAST_FLOOD,
        ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
        ALE_PORT_UNTAGGED_EGRESS,
+       ALE_PORT_MACONLY,
+       ALE_PORT_MACONLY_CAF,
        ALE_PORT_BCAST_LIMIT,
        ALE_PORT_MCAST_LIMIT,
        ALE_NUM_CONTROLS,