ata: pata_hpt3x2n: pass base DPLL frequency to hpt3x2n_pci_clock()

Currently, the base DPLL frequency is hardcoded in hpt3x2n_pci_clock().
Align with the updated 'pata_hpt37x' driver, where this frequency is a
parameter to hpt37x_pci_clock().

While at it, also do the following to align with the 'pata_hpt37x' driver:
- fix the 'freq' local variable's type;
- remove the 'iobase' local variable;
- extend the comment to the inl() call;
- move the 'total' local variable's declaration.

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>

diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index 1f6afd8ee29b32c447e25ac07f9e483e7cb09a0d..d1595e17dca26bf4c5f439ccdc0bce1e0f8b2075 100644 (file)
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -24,7 +24,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME       "pata_hpt3x2n"
-#define DRV_VERSION    "0.3.18"
+#define DRV_VERSION    "0.3.19"
 
 enum {
        PCI66           =       (1 << 1),
@@ -403,17 +403,20 @@ static int hpt3xn_calibrate_dpll(struct pci_dev *dev)
        return 0;
 }
 
-static int hpt3x2n_pci_clock(struct pci_dev *pdev)
+static int hpt3x2n_pci_clock(struct pci_dev *pdev, unsigned int base)
 {
-       unsigned long freq;
+       unsigned int freq;
        u32 fcnt;
-       unsigned long iobase = pci_resource_start(pdev, 4);
 
-       fcnt = inl(iobase + 0x90);      /* Not PCI readable for some chips */
+       /*
+        * Some devices do not let this value be accessed via PCI space
+        * according to the old driver.
+        */
+       fcnt = inl(pci_resource_start(pdev, 4) + 0x90);
        if ((fcnt >> 12) != 0xABCDE) {
+               u32 total = 0;
                int i;
                u16 sr;
-               u32 total = 0;
 
                dev_warn(&pdev->dev, "BIOS clock data not set\n");
 
@@ -427,7 +430,7 @@ static int hpt3x2n_pci_clock(struct pci_dev *pdev)
        }
        fcnt &= 0x1FF;
 
-       freq = (fcnt * 77) / 192;
+       freq = (fcnt * base) / 192;     /* in MHz */
 
        /* Clamp to bands */
        if (freq < 40)
@@ -559,7 +562,7 @@ hpt372n:
         * 50 for UDMA100. Right now we always use 66
         */
 
-       pci_mhz = hpt3x2n_pci_clock(dev);
+       pci_mhz = hpt3x2n_pci_clock(dev, 77);
 
        f_low = (pci_mhz * 48) / 66;    /* PCI Mhz for 66Mhz DPLL */
        f_high = f_low + 2;             /* Tolerance */