powerpc/pseries: export LPAR security flavor in lparcfg
authorLaurent Dufour <ldufour@linux.ibm.com>
Fri, 5 Mar 2021 12:55:54 +0000 (13:55 +0100)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 26 Mar 2021 12:19:41 +0000 (23:19 +1100)
This is helpful to read the security flavor from inside the LPAR.

In /sys/kernel/debug/powerpc/security_features it can be seen if
mitigations are on or off but not the level set through the ASMI menu.
Furthermore, reporting it through /proc/powerpc/lparcfg allows an easy
processing by the lparstat command [1].

Export it like this in /proc/powerpc/lparcfg:

  $ grep security_flavor /proc/powerpc/lparcfg
  security_flavor=1

Value follows what is documented on the IBM support page [2]:

  0 Speculative execution fully enabled
  1 Speculative execution controls to mitigate user-to-kernel attacks
  2 Speculative execution controls to mitigate user-to-kernel and
    user-to-user side-channel attacks

[1] https://groups.google.com/g/powerpc-utils-devel/c/NaKXvdyl_UI/m/wa2stpIDAQAJ
[2] https://www.ibm.com/support/pages/node/715841

Signed-off-by: Laurent Dufour <ldufour@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210305125554.5165-1-ldufour@linux.ibm.com
arch/powerpc/include/asm/hvcall.h
arch/powerpc/platforms/pseries/lparcfg.c
arch/powerpc/platforms/pseries/pseries.h
arch/powerpc/platforms/pseries/setup.c

index ed6086d57b22e14a337139d92a421c1953934929..455e188da26dbbbb05e85d535a8149274a85c139 100644 (file)
 #define H_CPU_BEHAV_FAVOUR_SECURITY    (1ull << 63) // IBM bit 0
 #define H_CPU_BEHAV_L1D_FLUSH_PR       (1ull << 62) // IBM bit 1
 #define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR  (1ull << 61) // IBM bit 2
+#define H_CPU_BEHAV_FAVOUR_SECURITY_H  (1ull << 60) // IBM bit 3
 #define H_CPU_BEHAV_FLUSH_COUNT_CACHE  (1ull << 58) // IBM bit 5
 #define H_CPU_BEHAV_FLUSH_LINK_STACK   (1ull << 57) // IBM bit 6
 
index e278390ab28d14c53071ffc99c447c07fb487dbc..f71eac74ea92abba6ae3f6a1cf160f865e961c48 100644 (file)
@@ -537,6 +537,8 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v)
        parse_em_data(m);
        maxmem_data(m);
 
+       seq_printf(m, "security_flavor=%u\n", pseries_security_flavor);
+
        return 0;
 }
 
index a13438fca10a89fc73b1418ced9f069ef460a39b..8925a0fac15f7095bb4c3cc8f506aff776458af0 100644 (file)
@@ -108,6 +108,7 @@ static inline unsigned long cmo_get_page_size(void)
 
 int dlpar_workqueue_init(void);
 
+extern u32 pseries_security_flavor;
 void pseries_setup_security_mitigations(void);
 void pseries_lpar_read_hblkrm_characteristics(void);
 
index 145e3f4c999afeb3498080bc5014841383cf4f3f..754e493b7c05bbbe4d35df7f5f247aa0ed85375c 100644 (file)
@@ -86,6 +86,7 @@ EXPORT_SYMBOL(CMO_PageSize);
 
 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
 int ibm_nmi_interlock_token;
+u32 pseries_security_flavor;
 
 static void pSeries_show_cpuinfo(struct seq_file *m)
 {
@@ -535,9 +536,15 @@ static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
        /*
         * The features below are enabled by default, so we instead look to see
         * if firmware has *disabled* them, and clear them if so.
+        * H_CPU_BEHAV_FAVOUR_SECURITY_H could be set only if
+        * H_CPU_BEHAV_FAVOUR_SECURITY is.
         */
        if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
                security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
+       else if (result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY_H)
+               pseries_security_flavor = 1;
+       else
+               pseries_security_flavor = 2;
 
        if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
                security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);