target/mips: Add emulation of DSP ASE for nanoMIPS - part 2
authorStefan Markovic <smarkovic@wavecomp.com>
Thu, 2 Aug 2018 14:16:26 +0000 (16:16 +0200)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Fri, 24 Aug 2018 15:51:59 +0000 (17:51 +0200)
Add emulation of DSP ASE instructions for nanoMIPS - part 2.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
target/mips/translate.c

index d3635e71ba41272a1135ec71747ca5028fdae52e..59dcd87c674058b57c325694f41246872b41ba43 100644 (file)
@@ -19316,6 +19316,16 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
                 case NM_BC1NEZC:
                     gen_compute_branch_cp1_nm(ctx, OPC_BC1NEZ, rt, s);
                     break;
+                case NM_BPOSGE32C:
+                    check_dspr2(ctx);
+                    {
+                        int32_t imm = extract32(ctx->opcode, 1, 13) |
+                                      extract32(ctx->opcode, 0, 1) << 13;
+
+                        gen_compute_branch_nm(ctx, OPC_BPOSGE32, 4, -1, -2,
+                                              imm);
+                    }
+                    break;
                 default:
                     generate_exception_end(ctx, EXCP_RI);
                     break;