drm/i915/mtl: Wake GT before sending H2G message

Instead of waiting until the interrupt reaches GuC, we can grab a
forcewake while triggering the H2G interrupt. GEN11_GUC_HOST_INTERRUPT
is inside sgunit and is not affected by forcewakes. However, there
could be some delays when platform is entering/exiting some higher
level platform sleep states and a H2G is triggered. A forcewake
ensures those sleep states have been fully exited and further
processing occurs as expected. The hysteresis timers for C6 and
higher sleep states will ensure there is no unwanted race between the
wake and processing of the interrupts by GuC.

This will have an official WA soon so adding a FIXME in the comments.

v2: Make the new ranges watertight to address BAT failures and update
commit message (Matt R).

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240119193513.221730-1-vinay.belgaumkar@intel.com

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index dfefad5a5fec9e6fd1da6dd9bf9ec64905d8e958..76400e9c40f056a2059967b5cf960adbac112bd5 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1800,7 +1800,10 @@ static const struct intel_forcewake_range __mtl_fw_ranges[] = {
        GEN_FW_RANGE(0x24000, 0x2ffff, 0), /*
                0x24000 - 0x2407f: always on
                0x24080 - 0x2ffff: reserved */
-       GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_GT)
+       GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_GT),
+       GEN_FW_RANGE(0x40000, 0x1901ef, 0),
+       GEN_FW_RANGE(0x1901f0, 0x1901f3, FORCEWAKE_GT)
+               /* FIXME: WA to wake GT while triggering H2G */
 };
 
 /*