drm/i915/display: Allow fastsets when DP_SDP_VSC infoframe do not match with PSR...

When PSR is enabled it handles DP_SDP_VSC, changing revision and all
the other fields as necessary.
It can also enabled and disable this SDP as needed without a full
modeset.

So here masking DP_SDP_VSC bit when previous and future state PSR
enabled, it will still be checked when comparing the asked state
to what was programmed to hardware.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware configuration read out")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210514232247.144542-2-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 09d83d6dc0e9abc845611d6b5dae6b92ce64652c..c8e8422359b39bc955dacc93b8fe24da8af1b3ef 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8315,6 +8315,16 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
        } \
 } while (0)
 
+#define PIPE_CONF_CHECK_X_WITH_MASK(name, mask) do { \
+       if ((current_config->name & (mask)) != (pipe_config->name & (mask))) { \
+               pipe_config_mismatch(fastset, crtc, __stringify(name), \
+                                    "(expected 0x%08x, found 0x%08x)", \
+                                    current_config->name & (mask), \
+                                    pipe_config->name & (mask)); \
+               ret = false; \
+       } \
+} while (0)
+
 #define PIPE_CONF_CHECK_I(name) do { \
        if (current_config->name != pipe_config->name) { \
                pipe_config_mismatch(fastset, crtc, __stringify(name), \
@@ -8661,7 +8671,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
                PIPE_CONF_CHECK_I(min_voltage_level);
        }
 
-       PIPE_CONF_CHECK_X(infoframes.enable);
+       if (fastset && (current_config->has_psr || pipe_config->has_psr))
+               PIPE_CONF_CHECK_X_WITH_MASK(infoframes.enable,
+                                           ~intel_hdmi_infoframe_enable(DP_SDP_VSC));
+       else
+               PIPE_CONF_CHECK_X(infoframes.enable);
+
        PIPE_CONF_CHECK_X(infoframes.gcp);
        PIPE_CONF_CHECK_INFOFRAME(avi);
        PIPE_CONF_CHECK_INFOFRAME(spd);