arm64: dts: qcom: sm8150: add necessary ref clock to PCIe

The PCIe nodes should get the ref clock, according to information from
Qualcomm.

Link: https://lore.kernel.org/all/20231121065440.GB3315@thinkpad/
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231208105155.36097-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 8872c37d95d6c7eac9977cd07366b433976e8395..1f19a9f85d938df7c9023ae69c4138003b6aa85a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -1858,14 +1858,16 @@
                                 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
                                 <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
                                 <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>,
-                                <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
+                                <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK>;
                        clock-names = "pipe",
                                      "aux",
                                      "cfg",
                                      "bus_master",
                                      "bus_slave",
                                      "slave_q2a",
-                                     "tbu";
+                                     "tbu",
+                                     "ref";
 
                        iommu-map = <0x0   &apps_smmu 0x1d80 0x1>,
                                    <0x100 &apps_smmu 0x1d81 0x1>;
@@ -1949,14 +1951,16 @@
                                 <&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
                                 <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
                                 <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
-                                <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
+                                <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK>;
                        clock-names = "pipe",
                                      "aux",
                                      "cfg",
                                      "bus_master",
                                      "bus_slave",
                                      "slave_q2a",
-                                     "tbu";
+                                     "tbu",
+                                     "ref";
 
                        assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
                        assigned-clock-rates = <19200000>;