Convert docs/specs/virt-ctlr.txt to rST format.
I added the name of the device to give readers a bit more idea
of which device we're actually documenting here.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
20230927151205.70930-7-peter.maydell@linaro.org
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
F: include/hw/intc/goldfish_pic.h
F: include/hw/intc/m68k_irqc.h
F: include/hw/misc/virt_ctrl.h
+F: docs/specs/virt-ctlr.rst
MicroBlaze Machines
-------------------
ivshmem-spec
pvpanic
standard-vga
+ virt-ctlr
--- /dev/null
+Virtual System Controller
+=========================
+
+The ``virt-ctrl`` device is a simple interface defined for the pure
+virtual machine with no hardware reference implementation to allow the
+guest kernel to send command to the host hypervisor.
+
+The specification can evolve, the current state is defined as below.
+
+This is a MMIO mapped device using 256 bytes.
+
+Two 32bit registers are defined:
+
+the features register (read-only, address 0x00)
+ This register allows the device to report features supported by the
+ controller.
+ The only feature supported for the moment is power control (0x01).
+
+the command register (write-only, address 0x04)
+ This register allows the kernel to send the commands to the hypervisor.
+ The implemented commands are part of the power control feature and
+ are reset (1), halt (2) and panic (3).
+ A basic command, no-op (0), is always present and can be used to test the
+ register access. This command has no effect.
+++ /dev/null
-Virtual System Controller
-=========================
-
-This device is a simple interface defined for the pure virtual machine with no
-hardware reference implementation to allow the guest kernel to send command
-to the host hypervisor.
-
-The specification can evolve, the current state is defined as below.
-
-This is a MMIO mapped device using 256 bytes.
-
-Two 32bit registers are defined:
-
-1- the features register (read-only, address 0x00)
-
- This register allows the device to report features supported by the
- controller.
- The only feature supported for the moment is power control (0x01).
-
-2- the command register (write-only, address 0x04)
-
- This register allows the kernel to send the commands to the hypervisor.
- The implemented commands are part of the power control feature and
- are reset (1), halt (2) and panic (3).
- A basic command, no-op (0), is always present and can be used to test the
- register access. This command has no effect.