target/arm: Remove a handful of stray tabs

Following the bulk conversion of the iwMMXt code, there are
just a handful of hard coded tabs in target/arm; fix them.
This is a whitespace-only patch.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180821165215.29069-4-peter.maydell@linaro.org

diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c
index 7cac8734c70d19d5a6c700344bebf55ec59181d0..b2b22d231e3857b3c51ab592bf6dca78b6571337 100644 (file)
--- a/target/arm/arm-semi.c
+++ b/target/arm/arm-semi.c
@@ -136,7 +136,7 @@ static void arm_semi_cb(CPUState *cs, target_ulong ret, target_ulong err)
 #ifdef CONFIG_USER_ONLY
         ts->swi_errno = err;
 #else
-       syscall_err = err;
+        syscall_err = err;
 #endif
         reg0 = ret;
     } else {

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 62c36b415076545ded5aac1f479141e323c8413d..65c0fa0a659e63e8fc8cf44dd004b9b0765ad29b 100644 (file)
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1320,14 +1320,14 @@ enum arm_cpu_mode {
 #define ARM_VFP_FPINST2 10
 
 /* iwMMXt coprocessor control registers.  */
-#define ARM_IWMMXT_wCID                0
-#define ARM_IWMMXT_wCon                1
-#define ARM_IWMMXT_wCSSF       2
-#define ARM_IWMMXT_wCASF       3
-#define ARM_IWMMXT_wCGR0       8
-#define ARM_IWMMXT_wCGR1       9
-#define ARM_IWMMXT_wCGR2       10
-#define ARM_IWMMXT_wCGR3       11
+#define ARM_IWMMXT_wCID  0
+#define ARM_IWMMXT_wCon  1
+#define ARM_IWMMXT_wCSSF 2
+#define ARM_IWMMXT_wCASF 3
+#define ARM_IWMMXT_wCGR0 8
+#define ARM_IWMMXT_wCGR1 9
+#define ARM_IWMMXT_wCGR2 10
+#define ARM_IWMMXT_wCGR3 11
 
 /* V7M CCR bits */
 FIELD(V7M_CCR, NONBASETHRDENA, 0, 1)