clk: renesas: r8a779h0: Add watchdog clock

Add the module clock used by the RCLK Watchdog Timer on the Renesas
R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f1dbf0f3f484015f2e629d78b746cf377d6f6746.1706790015.git.geert+renesas@glider.be

diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
index 219941047291d34d864fbafaf4d8cbae54b24f20..322db567d5f889d6bc3c52028063617f8abd1067 100644 (file)
--- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
@@ -177,6 +177,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
        DEF_MOD("hscif1",       515,    R8A779H0_CLK_SASYNCPERD1),
        DEF_MOD("hscif2",       516,    R8A779H0_CLK_SASYNCPERD1),
        DEF_MOD("hscif3",       517,    R8A779H0_CLK_SASYNCPERD1),
+       DEF_MOD("wdt1:wdt0",    907,    R8A779H0_CLK_R),
        DEF_MOD("pfc0",         915,    R8A779H0_CLK_CP),
        DEF_MOD("pfc1",         916,    R8A779H0_CLK_CP),
        DEF_MOD("pfc2",         917,    R8A779H0_CLK_CP),