KVM: x86: Don't advertise guest.MAXPHYADDR as host.MAXPHYADDR in CPUID

Drop KVM's propagation of GuestPhysBits (CPUID leaf 80000008, EAX[23:16])
to HostPhysBits (same leaf, EAX[7:0]) when advertising the address widths
to userspace via KVM_GET_SUPPORTED_CPUID.

Per AMD, GuestPhysBits is intended for software use, and physical CPUs do
not set that field.  I.e. GuestPhysBits will be non-zero if and only if
KVM is running as a nested hypervisor, and in that case, GuestPhysBits is
NOT guaranteed to capture the CPU's effective MAXPHYADDR when running with
TDP enabled.

E.g. KVM will soon use GuestPhysBits to communicate the CPU's maximum
*addressable* guest physical address, which would result in KVM under-
reporting PhysBits when running as an L1 on a CPU with MAXPHYADDR=52,
but without 5-level paging.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: stable@vger.kernel.org
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Link: https://lore.kernel.org/r/20240313125844.912415-2-kraxel@redhat.com
[sean: rewrite changelog with --verbose, Cc stable@]
Signed-off-by: Sean Christopherson <seanjc@google.com>

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index bfc0bfcb2bc60dd2860fa4617f3dc92dea1f3a97..d1cbb14f85533d92a6e62d9134ff80e35b842892 100644 (file)
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -1231,9 +1231,8 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
                entry->eax = entry->ebx = entry->ecx = 0;
                break;
        case 0x80000008: {
-               unsigned g_phys_as = (entry->eax >> 16) & 0xff;
-               unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
-               unsigned phys_as = entry->eax & 0xff;
+               unsigned int virt_as = max((entry->eax >> 8) & 0xff, 48U);
+               unsigned int phys_as;
 
                /*
                 * If TDP (NPT) is disabled use the adjusted host MAXPHYADDR as
@@ -1241,16 +1240,16 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
                 * reductions in MAXPHYADDR for memory encryption affect shadow
                 * paging, too.
                 *
-                * If TDP is enabled but an explicit guest MAXPHYADDR is not
-                * provided, use the raw bare metal MAXPHYADDR as reductions to
-                * the HPAs do not affect GPAs.
+                * If TDP is enabled, use the raw bare metal MAXPHYADDR as
+                * reductions to the HPAs do not affect GPAs.
                 */
-               if (!tdp_enabled)
-                       g_phys_as = boot_cpu_data.x86_phys_bits;
-               else if (!g_phys_as)
-                       g_phys_as = phys_as;
+               if (!tdp_enabled) {
+                       phys_as = boot_cpu_data.x86_phys_bits;
+               } else {
+                       phys_as = entry->eax & 0xff;
+               }
 
-               entry->eax = g_phys_as | (virt_as << 8);
+               entry->eax = phys_as | (virt_as << 8);
                entry->ecx &= ~(GENMASK(31, 16) | GENMASK(11, 8));
                entry->edx = 0;
                cpuid_entry_override(entry, CPUID_8000_0008_EBX);