ARM: dts: qcom: msm8974: Drop flags for mdss irqs
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 2 Mar 2022 22:54:11 +0000 (01:54 +0300)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 13 Apr 2022 02:34:35 +0000 (21:34 -0500)
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Fixes: 5a9fc531f6ec ("ARM: dts: msm8974: add display support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-6-dmitry.baryshkov@linaro.org
arch/arm/boot/dts/qcom-msm8974.dtsi

index a249b05af9b1aaf0fbcd22b7aaacf145635a5191..4a1f3768d75c0dc97f51fd50acd98dfa361add6c 100644 (file)
                                reg-names = "mdp_phys";
 
                                interrupt-parent = <&mdss>;
-                               interrupts = <0 0>;
+                               interrupts = <0>;
 
                                clocks = <&mmcc MDSS_AHB_CLK>,
                                         <&mmcc MDSS_AXI_CLK>,
                                reg-names = "dsi_ctrl";
 
                                interrupt-parent = <&mdss>;
-                               interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <4>;
 
                                assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
                                                  <&mmcc PCLK0_CLK_SRC>;