spi: mtk-snfi: Add snfi support for MT7986 IC

Add snfi support for MT7986 IC.

Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221205065756.26875-2-xiangsheng.hou@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-mtk-snfi.c b/drivers/spi/spi-mtk-snfi.c
index d66bf9762557ca68a276303ca038ff5d3721c954..fa8412ba20e2e1682e2954d4ba3c56f21f6df412 100644 (file)
--- a/drivers/spi/spi-mtk-snfi.c
+++ b/drivers/spi/spi-mtk-snfi.c
@@ -126,7 +126,8 @@
 #define STR_DATA BIT(0)
 
 #define NFI_STA 0x060
-#define NFI_NAND_FSM GENMASK(28, 24)
+#define NFI_NAND_FSM_7622 GENMASK(28, 24)
+#define NFI_NAND_FSM_7986 GENMASK(29, 23)
 #define NFI_FSM GENMASK(19, 16)
 #define READ_EMPTY BIT(12)
 
@@ -158,6 +159,7 @@
 #define MAS_WR GENMASK(5, 3)
 #define MAS_RDDLY GENMASK(2, 0)
 #define NFI_MASTERSTA_MASK_7622 (MAS_ADDR | MAS_RD | MAS_WR | MAS_RDDLY)
+#define NFI_MASTERSTA_MASK_7986 3
 
 // SNFI registers
 #define SNF_MAC_CTL 0x500
@@ -220,6 +222,11 @@
 
 static const u8 mt7622_spare_sizes[] = { 16, 26, 27, 28 };
 
+static const u8 mt7986_spare_sizes[] = {
+       16, 26, 27, 28, 32, 36, 40, 44, 48, 49, 50, 51, 52, 62, 61, 63, 64, 67,
+       74
+};
+
 struct mtk_snand_caps {
        u16 sector_size;
        u16 max_sectors;
@@ -230,6 +237,7 @@ struct mtk_snand_caps {
        bool bbm_swap;
        bool empty_page_check;
        u32 mastersta_mask;
+       u32 nandfsm_mask;
 
        const u8 *spare_sizes;
        u32 num_spare_size;
@@ -244,6 +252,7 @@ static const struct mtk_snand_caps mt7622_snand_caps = {
        .bbm_swap = false,
        .empty_page_check = false,
        .mastersta_mask = NFI_MASTERSTA_MASK_7622,
+       .nandfsm_mask = NFI_NAND_FSM_7622,
        .spare_sizes = mt7622_spare_sizes,
        .num_spare_size = ARRAY_SIZE(mt7622_spare_sizes)
 };
@@ -257,10 +266,25 @@ static const struct mtk_snand_caps mt7629_snand_caps = {
        .bbm_swap = true,
        .empty_page_check = false,
        .mastersta_mask = NFI_MASTERSTA_MASK_7622,
+       .nandfsm_mask = NFI_NAND_FSM_7622,
        .spare_sizes = mt7622_spare_sizes,
        .num_spare_size = ARRAY_SIZE(mt7622_spare_sizes)
 };
 
+static const struct mtk_snand_caps mt7986_snand_caps = {
+       .sector_size = 1024,
+       .max_sectors = 8,
+       .fdm_size = 8,
+       .fdm_ecc_size = 1,
+       .fifo_size = 64,
+       .bbm_swap = true,
+       .empty_page_check = true,
+       .mastersta_mask = NFI_MASTERSTA_MASK_7986,
+       .nandfsm_mask = NFI_NAND_FSM_7986,
+       .spare_sizes = mt7986_spare_sizes,
+       .num_spare_size = ARRAY_SIZE(mt7986_spare_sizes)
+};
+
 struct mtk_snand_conf {
        size_t page_size;
        size_t oob_size;
@@ -360,7 +384,7 @@ static int mtk_nfi_reset(struct mtk_snand *snf)
        }
 
        ret = readl_poll_timeout(snf->nfi_base + NFI_STA, val,
-                                !(val & (NFI_FSM | NFI_NAND_FSM)), 0,
+                                !(val & (NFI_FSM | snf->caps->nandfsm_mask)), 0,
                                 SNFI_POLL_INTERVAL);
        if (ret) {
                dev_err(snf->dev, "Failed to reset NFI\n");
@@ -1295,6 +1319,7 @@ static irqreturn_t mtk_snand_irq(int irq, void *id)
 static const struct of_device_id mtk_snand_ids[] = {
        { .compatible = "mediatek,mt7622-snand", .data = &mt7622_snand_caps },
        { .compatible = "mediatek,mt7629-snand", .data = &mt7629_snand_caps },
+       { .compatible = "mediatek,mt7986-snand", .data = &mt7986_snand_caps },
        {},
 };