arm64: dts: microchip: sparx5: do not use PSCI on reference boards
authorRobert Marko <robert.marko@sartura.hr>
Tue, 21 Feb 2023 10:50:37 +0000 (11:50 +0100)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 17 May 2023 12:13:31 +0000 (14:13 +0200)
PSCI is not implemented on SparX-5 at all, there is no ATF and U-boot that
is shipped does not implement it as well.

I have tried flashing the latest BSP 2022.12 U-boot which did not work.
After contacting Microchip, they confirmed that there is no ATF for the
SoC nor PSCI implementation which is unfortunate in 2023.

So, disable PSCI as otherwise kernel crashes as soon as it tries probing
PSCI with, and the crash is only visible if earlycon is used.

Since PSCI is not implemented, switch core bringup to use spin-tables
which are implemented in the vendor U-boot and actually work.

Tested on PCB134 with eMMC (VSC5640EV).

Fixes: 6694aee00a4b ("arm64: dts: sparx5: Add basic cpu support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Link: https://lore.kernel.org/r/20230221105039.316819-1-robert.marko@sartura.hr
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/microchip/sparx5.dtsi
arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi

index 6f7651b064780bc042ab3ad11454e4c06eb855dc..ed6f57ce38f7fc11b8e184c6c6c8cbe24f03efb8 100644 (file)
@@ -63,7 +63,7 @@
                interrupt-affinity = <&cpu0>, <&cpu1>;
        };
 
-       psci {
+       psci: psci {
                compatible = "arm,psci-0.2";
                method = "smc";
        };
index 9d1a082de3e29f19d34e11fbdcca241ad3b9e960..32bb76b3202a0c66f93868498099add6f843028d 100644 (file)
@@ -6,6 +6,18 @@
 /dts-v1/;
 #include "sparx5.dtsi"
 
+&psci {
+       status = "disabled";
+};
+
+&cpu0 {
+       enable-method = "spin-table";
+};
+
+&cpu1 {
+       enable-method = "spin-table";
+};
+
 &uart0 {
        status = "okay";
 };