Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <
20230822032724.
1353391-13-gaosong@loongson.cn>
Message-Id: <
20230822071959.35620-7-philmd@linaro.org>
TCGv_i32 mem_idx = tcg_constant_i32(ctx->mem_idx);
TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+ if (!avail_LSPW(ctx)) {
+ return true;
+ }
+
if (check_plv(ctx)) {
return false;
}
TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
+ if (!avail_LSPW(ctx)) {
+ return true;
+ }
+
if (check_plv(ctx)) {
return false;
}
#define avail_FP(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, FP))
#define avail_FP_SP(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, FP_SP))
#define avail_FP_DP(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, FP_DP))
+#define avail_LSPW(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSPW))
/*
* If an operation is being performed on less than TARGET_LONG_BITS,