drm/amd/display: Don't perform rate toggle on DP2-capable FIXED_VS retimers

[WHY]
Only required if FIXED_VS retimer does not support DP2-capable.

[HOW]
Gate link rate toggle with DP 128b/132b LTTPR channel coding cap check.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
index c36e0e5df44701747f023806c41036f7c264a34b..b5cf75975fffd64774aa9ee8ed64ba44e50deb6e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
@@ -270,18 +270,20 @@ enum link_training_result dp_perform_fixed_vs_pe_training_sequence(
 
        rate = get_dpcd_link_rate(&lt_settings->link_settings);
 
-       /* Vendor specific: Toggle link rate */
-       toggle_rate = (rate == 0x6) ? 0xA : 0x6;
+       if (!link->dpcd_caps.lttpr_caps.main_link_channel_coding.bits.DP_128b_132b_SUPPORTED) {
+               /* Vendor specific: Toggle link rate */
+               toggle_rate = (rate == 0x6) ? 0xA : 0x6;
 
-       if (link->vendor_specific_lttpr_link_rate_wa == rate || link->vendor_specific_lttpr_link_rate_wa == 0) {
-               core_link_write_dpcd(
-                               link,
-                               DP_LINK_BW_SET,
-                               &toggle_rate,
-                               1);
-       }
+               if (link->vendor_specific_lttpr_link_rate_wa == rate || link->vendor_specific_lttpr_link_rate_wa == 0) {
+                       core_link_write_dpcd(
+                                       link,
+                                       DP_LINK_BW_SET,
+                                       &toggle_rate,
+                                       1);
+               }
 
-       link->vendor_specific_lttpr_link_rate_wa = rate;
+               link->vendor_specific_lttpr_link_rate_wa = rate;
+       }
 
        core_link_write_dpcd(link, DP_LINK_BW_SET, &rate, 1);