crypto: octeontx2 - remove CPT block reset

CPT block reset in CPT PF erase all the CPT configuration which is
done in AF driver init. So, remove CPT block reset from CPT PF as
it is also being done in AF init and not required in PF.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
index b13df6a4964441bf33f87fc8c78db44370262e67..a9d372d88a355aa8cc7a8a3b776df5e119ea7e5e 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
@@ -587,45 +587,6 @@ static int cpt_is_pf_usable(struct otx2_cptpf_dev *cptpf)
        return 0;
 }
 
-static int cptx_device_reset(struct otx2_cptpf_dev *cptpf, int blkaddr)
-{
-       int timeout = 10, ret;
-       u64 reg = 0;
-
-       ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev,
-                                   CPT_AF_BLK_RST, 0x1, blkaddr);
-       if (ret)
-               return ret;
-
-       do {
-               ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev,
-                                          CPT_AF_BLK_RST, &reg, blkaddr);
-               if (ret)
-                       return ret;
-
-               if (!((reg >> 63) & 0x1))
-                       break;
-
-               usleep_range(10000, 20000);
-               if (timeout-- < 0)
-                       return -EBUSY;
-       } while (1);
-
-       return ret;
-}
-
-static int cptpf_device_reset(struct otx2_cptpf_dev *cptpf)
-{
-       int ret = 0;
-
-       if (cptpf->has_cpt1) {
-               ret = cptx_device_reset(cptpf, BLKADDR_CPT1);
-               if (ret)
-                       return ret;
-       }
-       return cptx_device_reset(cptpf, BLKADDR_CPT0);
-}
-
 static void cptpf_check_block_implemented(struct otx2_cptpf_dev *cptpf)
 {
        u64 cfg;
@@ -643,10 +604,6 @@ static int cptpf_device_init(struct otx2_cptpf_dev *cptpf)
 
        /* check if 'implemented' bit is set for block BLKADDR_CPT1 */
        cptpf_check_block_implemented(cptpf);
-       /* Reset the CPT PF device */
-       ret = cptpf_device_reset(cptpf);
-       if (ret)
-               return ret;
 
        /* Get number of SE, IE and AE engines */
        ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev,