dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq
authorSamuel Holland <samuel@sholland.org>
Thu, 18 Nov 2021 03:18:36 +0000 (21:18 -0600)
committerMaxime Ripard <maxime@cerno.tech>
Tue, 23 Nov 2021 10:29:35 +0000 (11:29 +0100)
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS
hardware implements memory dynamic frequency scaling using this clock.

Export this clock for SoCs which will be getting a devfreq driver.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
drivers/clk/sunxi-ng/ccu-sun50i-a64.h
drivers/clk/sunxi-ng/ccu-sun8i-h3.h
include/dt-bindings/clock/sun50i-a64-ccu.h
include/dt-bindings/clock/sun8i-h3-ccu.h

index 54d1f96f4b68992026eb16b19bc4ef6b9690fe22..a8c11c0b4e067675e0753f3dc5a83e22b1f84428 100644 (file)
@@ -51,8 +51,6 @@
 
 #define CLK_USB_OHCI1_12M              92
 
-#define CLK_DRAM                       94
-
 /* All the DRAM gates are exported */
 
 /* And the DSI and GPU module clock is exported */
index d8c38447e11b6609a27fb032132d79a632a1d474..e13f3c4b57d0161129a390c9564d0a3885c35343 100644 (file)
@@ -42,8 +42,6 @@
 
 /* The first bunch of module clocks are exported */
 
-#define CLK_DRAM               96
-
 /* All the DRAM gates are exported */
 
 /* Some more module clocks are exported */
index 318eb15c414ce2567da08bdb88deeb68c422914d..175892189e9dcb5597b6b2cd78f987a3c28d1f2b 100644 (file)
 #define CLK_USB_OHCI0          91
 
 #define CLK_USB_OHCI1          93
-
+#define CLK_DRAM               94
 #define CLK_DRAM_VE            95
 #define CLK_DRAM_CSI           96
 #define CLK_DRAM_DEINTERLACE   97
index 30d2d15373a25870b47cf60e06d2d47b983fee08..5d4ada2c22e606d66fdab191fead274735b65034 100644 (file)
 #define CLK_USB_OHCI1          93
 #define CLK_USB_OHCI2          94
 #define CLK_USB_OHCI3          95
-
+#define CLK_DRAM               96
 #define CLK_DRAM_VE            97
 #define CLK_DRAM_CSI           98
 #define CLK_DRAM_DEINTERLACE   99