drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc
authoryipechai <YiPeng.Chai@amd.com>
Fri, 14 Jan 2022 02:40:15 +0000 (10:40 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Jan 2022 22:24:24 +0000 (17:24 -0500)
drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc:
1. WARNING: missing space after struct definition.
2. WARNING: please, no space before tabs.
3. WARNING: line length of xxx exceeds 100 columns.
4. ERROR: "foo* bar" should be "foo *bar".
5. ERROR: space required before the open parenthesis '('.
6. ERROR: space prohibited after that open parenthesis '('.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
drivers/gpu/drm/amd/amdgpu/mca_v3_0.c

index c94a4b3c8d6dc9b0243d85e85fb62cda85d1bd34..4af2c2a322e7d5c7597e0ce289ccafc618db7fd8 100644 (file)
@@ -24,7 +24,7 @@
 #define __AMDGPU_HDP_H__
 #include "amdgpu_ras.h"
 
-struct amdgpu_hdp_ras{
+struct amdgpu_hdp_ras {
        struct amdgpu_ras_block_object ras_block;
 };
 
@@ -40,7 +40,7 @@ struct amdgpu_hdp_funcs {
 struct amdgpu_hdp {
        struct ras_common_if                    *ras_if;
        const struct amdgpu_hdp_funcs           *funcs;
-       struct amdgpu_hdp_ras   *ras;
+       struct amdgpu_hdp_ras   *ras;
 };
 
 int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, void *ras_info);
index 478457637d29d3f605d5198e1bb2c09a98ee45ac..5929d6f528c9607807412da8a6f96b01e3e19a19 100644 (file)
@@ -950,7 +950,8 @@ static void amdgpu_xgmi_query_ras_error_count(struct amdgpu_device *adev,
 static int amdgpu_ras_error_inject_xgmi(struct amdgpu_device *adev,  void *inject_if)
 {
        int ret = 0;
-       struct ta_ras_trigger_error_input *block_info =  (struct ta_ras_trigger_error_input *)inject_if;
+       struct ta_ras_trigger_error_input *block_info =
+                               (struct ta_ras_trigger_error_input *)inject_if;
 
        if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
                dev_warn(adev->dev, "Failed to disallow df cstate");
index f51092041edc6223fad71bfc3491640c5bbbaed0..68565262af9cf8170075b7823747beaf5efa276b 100644 (file)
@@ -47,12 +47,13 @@ static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev)
        amdgpu_mca_ras_fini(adev, &adev->mca.mp0);
 }
 
-static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object* block_obj, enum amdgpu_ras_block block, uint32_t sub_block_index)
+static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj,
+                               enum amdgpu_ras_block block, uint32_t sub_block_index)
 {
-       if(!block_obj)
+       if (!block_obj)
                return -EINVAL;
 
-       if(block_obj->block == block) &&
+       if ((block_obj->block == block) &&
                (block_obj->sub_block_index == sub_block_index)) {
                return 0;
        }