arm64: dts: qcom: sdm845-audio-wcd9340: commonize pinctrl

Pin configuration fow WCD9340 is the same in all users, so move it to
common file to reduce the code duplication (which still allows further
customizations per board).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230123084300.22353-5-krzysztof.kozlowski@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index f8d685304819813d1fd95012150bc07a35df50bb..4f48c30201563b348ab56c0a26fc740c6e57b285 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -971,15 +971,6 @@
                function = "gpio";
                bias-pull-up;
        };
-
-       wcd_intr_default: wcd-intr-default-state {
-               pins = "gpio54";
-               function = "gpio";
-
-               input-enable;
-               bias-pull-down;
-               drive-strength = <2>;
-       };
 };
 
 &uart3 {
@@ -1085,8 +1076,6 @@
 };
 
 &wcd9340 {
-       pinctrl-0 = <&wcd_intr_default>;
-       pinctrl-names = "default";
        clock-names = "extclk";
        clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi b/arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi
index 5bcce7d0d7095b77cb7397a5568849287b5042d7..33718cb95c838dca45fe442105da2decd98d8ecb 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi
@@ -32,6 +32,10 @@
                        #clock-cells = <0>;
                        clock-frequency = <9600000>;
                        clock-output-names = "mclk";
+
+                       pinctrl-0 = <&wcd_intr_default>;
+                       pinctrl-names = "default";
+
                        qcom,micbias1-microvolt = <1800000>;
                        qcom,micbias2-microvolt = <1800000>;
                        qcom,micbias3-microvolt = <1800000>;
@@ -67,3 +71,14 @@
                };
        };
 };
+
+&tlmm {
+       wcd_intr_default: wcd-intr-default-state {
+               pins = "gpio54";
+               function = "gpio";
+
+               input-enable;
+               bias-pull-down;
+               drive-strength = <2>;
+       };
+};

diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi
index 045f832eb9f8980a1e87e67ee90996a2fdc7b072..321dd43d7aa4e2f893cfa91f2299b74905c8767f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi
@@ -467,15 +467,6 @@
                function = "gpio";
                bias-pull-up;
        };
-
-       wcd_intr_default: wcd-intr-default-state {
-               pins = "gpio54";
-               function = "gpio";
-
-               input-enable;
-               bias-pull-down;
-               drive-strength = <2>;
-       };
 };
 
 &uart6 {
@@ -544,8 +535,6 @@
 };
 
 &wcd9340 {
-       pinctrl-0 = <&wcd_intr_default>;
-       pinctrl-names = "default";
        clock-names = "extclk";
        clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
index c66747a93e240d791dbc7d7183ed0c6d4eb970f7..3450dcc29cd1ee0a72af07e7e9d5c29a529903bf 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
@@ -617,14 +617,6 @@
                drive-strength = <2>;
                bias-pull-down;
        };
-
-       wcd_intr_default: wcd-intr-default-state {
-               pins = "gpio54";
-               function = "gpio";
-               input-enable;
-               bias-pull-down;
-               drive-strength = <2>;
-       };
 };
 
 &uart6 {
@@ -701,8 +693,6 @@
 };
 
 &wcd9340 {
-       pinctrl-0 = <&wcd_intr_default>;
-       pinctrl-names = "default";
        clock-names = "extclk";
        clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
index 668ba8a7dbbdf0f94e6e209233606e6eecc14f5d..bb8368e49d72ecc65a2c5340d7a99db9c3fa2633 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
+++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
@@ -629,15 +629,6 @@
                drive-strength = <2>;
        };
 
-       wcd_intr_default: wcd-intr-default-state {
-               pins = "gpio54";
-               function = "gpio";
-
-               input-enable;
-               bias-pull-down;
-               drive-strength = <2>;
-       };
-
        lid_pin_active: lid-pin-state {
                pins = "gpio124";
                function = "gpio";
@@ -748,8 +739,6 @@
 };
 
 &wcd9340 {
-       pinctrl-0 = <&wcd_intr_default>;
-       pinctrl-names = "default";
        clock-names = "extclk";
        clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
index 9d2e13819ad57e0239045460d5e53f97a0eff6a9..b414607d20c6e245e3ffb48ccdc60dfad6198f86 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
+++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
@@ -553,15 +553,6 @@
                 */
                output-high;
        };
-
-       wcd_intr_default: wcd-intr-default-state {
-               pins = "gpio54";
-               function = "gpio";
-
-               input-enable;
-               bias-pull-down;
-               drive-strength = <2>;
-       };
 };
 
 &uart6 {
@@ -657,8 +648,6 @@
 };
 
 &wcd9340 {
-       pinctrl-0 = <&wcd_intr_default>;
-       pinctrl-names = "default";
        clock-names = "extclk";
        clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
        reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;