/* cgn_reg_signal and cgn_init_reg_signal use
                 * enum fc_edc_cg_signal_cap_types
                 */
-       u16 cgn_fpin_frequency;
+       u16 cgn_fpin_frequency;         /* In units of msecs */
 #define LPFC_FPIN_INIT_FREQ    0xffff
        u32 cgn_sig_freq;
        u32 cgn_acqe_cnt;
 
 #define lpfc_sliport_eqdelay_id_WORD   word0
 #define LPFC_SEC_TO_USEC               1000000
 #define LPFC_SEC_TO_MSEC               1000
+#define LPFC_MSECS_TO_SECS(msecs) ((msecs) / 1000)
 
 /* The following Registers apply to SLI4 if_type 0 UCNAs. They typically
  * reside in BAR 2.
 #define cmf_sync_cqid_WORD     word11
        uint32_t read_bytes;
        uint32_t word13;
+#define cmf_sync_period_SHIFT  16
+#define cmf_sync_period_MASK   0x0000ffff
+#define cmf_sync_period_WORD   word13
        uint32_t word14;
        uint32_t word15;
 };
 
        unsigned long iflags;
        u32 ret_val;
        u32 atot, wtot, max;
+       u16 warn_sync_period = 0;
 
        /* First address any alarm / warning activity */
        atot = atomic_xchg(&phba->cgn_sync_alarm_cnt, 0);
                                lpfc_acqe_cgn_frequency;
                        bf_set(cmf_sync_wsigmax, &wqe->cmf_sync, max);
                        bf_set(cmf_sync_wsigcnt, &wqe->cmf_sync, wtot);
+                       warn_sync_period = lpfc_acqe_cgn_frequency;
                } else {
                        /* We hit a FPIN warning condition */
                        bf_set(cmf_sync_wfpinmax, &wqe->cmf_sync, 1);
                        bf_set(cmf_sync_wfpincnt, &wqe->cmf_sync, 1);
+                       if (phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ)
+                               warn_sync_period =
+                               LPFC_MSECS_TO_SECS(phba->cgn_fpin_frequency);
                }
        }
 
        bf_set(cmf_sync_reqtag, &wqe->cmf_sync, sync_buf->iotag);
 
        bf_set(cmf_sync_qosd, &wqe->cmf_sync, 1);
+       bf_set(cmf_sync_period, &wqe->cmf_sync, warn_sync_period);
 
        bf_set(cmf_sync_cmd_type, &wqe->cmf_sync, CMF_SYNC_COMMAND);
        bf_set(cmf_sync_wqec, &wqe->cmf_sync, 1);