{ RT1308_VREF,                  0x18100000 },
        { RT1308_IV_SENSE,              0x87010000 },
        { RT1308_DUMMY_REG,             0x00000200 },
-       { RT1308_SIL_DET,               0x61c30000 },
+       { RT1308_SIL_DET,               0xe1c30000 },
        { RT1308_DC_CAL_2,              0x00ffff00 },
        { RT1308_CLK_DET,               0x01000000 },
-       { RT1308_POWER_STATUS,          0x00800000 },
+       { RT1308_POWER_STATUS,          0x08800000 },
        { RT1308_DAC_SET,               0xafaf0700 },
 
 };
        case SND_SOC_DAPM_POST_PMU:
                msleep(30);
                snd_soc_component_update_bits(component, RT1308_POWER_STATUS,
-                       RT1308_POW_PDB_REG_BIT, RT1308_POW_PDB_REG_BIT);
+                       RT1308_POW_PDB_REG_BIT | RT1308_POW_PDB_MN_BIT,
+                       RT1308_POW_PDB_REG_BIT | RT1308_POW_PDB_MN_BIT);
                msleep(40);
                break;
        case SND_SOC_DAPM_PRE_PMD:
                snd_soc_component_update_bits(component, RT1308_POWER_STATUS,
-                       RT1308_POW_PDB_REG_BIT, 0);
+                       RT1308_POW_PDB_REG_BIT | RT1308_POW_PDB_MN_BIT, 0);
                usleep_range(150000, 200000);
                break;