{ CS35L41_AMP_DIG_VOL_CTRL,     0x0000A678 }, // AMP_VOL_PCM Mute
 };
 
-// only on amps where GPIO1 is used to control ext. VSPK switch
-static const struct reg_sequence cs35l41_start_ext_vspk[] = {
+static const struct reg_sequence cs35l41_safe_to_reset[] = {
        { 0x00000040,                   0x00000055 },
        { 0x00000040,                   0x000000AA },
-       { 0x00007438,                   0x00585941 },
-       { 0x00007414,                   0x08C82222 },
-       { 0x0000742C,                   0x00000009 },
-       { 0x00011008,                   0x00008001 },
-       { 0x0000742C,                   0x0000000F },
-       { 0x0000742C,                   0x00000079 },
-       { 0x00007438,                   0x00585941 },
-       { CS35L41_PWR_CTRL1,            0x00000001, 3000}, // set GLOBAL_EN = 1
-       { 0x0000742C,                   0x000000F9 },
-       { 0x00007438,                   0x00580941 },
-       { 0x00000040,                   0x000000CC },
-       { 0x00000040,                   0x00000033 },
-};
-
-//only on amps where GPIO1 is used to control ext. VSPK switch
-static const struct reg_sequence cs35l41_stop_ext_vspk[] = {
-       { 0x00000040,                   0x00000055 },
-       { 0x00000040,                   0x000000AA },
-       { 0x00007438,                   0x00585941 },
-       { 0x00002014,                   0x00000000, 3000}, // set GLOBAL_EN = 0
-       { 0x0000742C,                   0x00000009 },
-       { 0x00007438,                   0x00580941 },
-       { 0x00011008,                   0x00000001 },
        { 0x0000393C,                   0x000000C0, 6000},
        { 0x0000393C,                   0x00000000 },
        { 0x00007414,                   0x00C82222 },
        { 0x0000742C,                   0x0000000F },
        { 0x0000742C,                   0x00000079 },
        { 0x00007438,                   0x00585941 },
-       { CS35L41_PWR_CTRL1,            0x00000001, 2000 }, // GLOBAL_EN = 1
+       { CS35L41_PWR_CTRL1,            0x00000001, 3000 }, // GLOBAL_EN = 1
        { 0x0000742C,                   0x000000F9 },
        { 0x00007438,                   0x00580941 },
        { 0x00000040,                   0x000000CC },
        { 0x00000040,                   0x000000AA },
        { 0x00007438,                   0x00585941 },
        { CS35L41_PWR_CTRL1,            0x00000000 },
-       { 0x0000742C,                   0x00000009, 2000 },
+       { 0x0000742C,                   0x00000009, 3000 },
        { 0x00007438,                   0x00580941 },
        { 0x00000040,                   0x000000CC },
        { 0x00000040,                   0x00000033 },
        { 0x00000040,                   0x00000033 },
 };
 
+static bool cs35l41_hda_safe_reset(struct cs35l41_hda *cs35l41)
+{
+       switch (cs35l41->hw_cfg.bst_type) {
+       case CS35L41_EXT_BOOST:
+               regmap_write(cs35l41->regmap, CS35L41_GPIO1_CTRL1, 0x00000001);
+               regmap_multi_reg_write(cs35l41->regmap, cs35l41_safe_to_reset,
+                                      ARRAY_SIZE(cs35l41_safe_to_reset));
+               return true;
+       case CS35L41_EXT_BOOST_NO_VSPK_SWITCH:
+               return false;
+       default:
+               return true;
+       }
+};
+
 static int cs35l41_hda_global_enable(struct cs35l41_hda *cs35l41, int enable)
 {
        int ret;
                usleep_range(3000, 3100);
                break;
        case CS35L41_EXT_BOOST:
-               if (enable)
-                       ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_start_ext_vspk,
-                                                    ARRAY_SIZE(cs35l41_start_ext_vspk));
-               else
-                       ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_stop_ext_vspk,
-                                                    ARRAY_SIZE(cs35l41_stop_ext_vspk));
-               break;
        case CS35L41_EXT_BOOST_NO_VSPK_SWITCH:
                if (enable)
                        ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_safe_to_active,
                regmap_multi_reg_write(reg, cs35l41_hda_config, ARRAY_SIZE(cs35l41_hda_config));
                ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2,
                                         CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT);
+               if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST)
+                       regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00008001);
                break;
        case HDA_GEN_PCM_ACT_PREPARE:
                ret = cs35l41_hda_global_enable(cs35l41, 1);
        case HDA_GEN_PCM_ACT_CLOSE:
                ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2,
                                         CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT);
+               if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST)
+                       regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001);
                break;
        default:
                dev_warn(cs35l41->dev, "Playback action not supported: %d\n", action);
        return 0;
 
 err:
-       if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH)
+       if (cs35l41_hda_safe_reset(cs35l41))
                gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
        gpiod_put(cs35l41->reset_gpio);
 
 
        component_del(cs35l41->dev, &cs35l41_hda_comp_ops);
 
-       if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH)
+       if (cs35l41_hda_safe_reset(cs35l41))
                gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
        gpiod_put(cs35l41->reset_gpio);
 }