arm64: dts: qcom: sdm630: Add interconnect and opp table to sdhc_1

The SDHC port 1 has interconnects and can make use of DVFS:
define the interconnections and the OPP table in order to
optimize performance and power consumption.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-11-konrad.dybcio@somainline.org
[bjorn: Dropped "sdhc1-" prefix from opp-table node]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 9baaf86e6a73842ca021befc328b3eae923fcea6..c8d85e03d0aefa151d1e699af9c195c76b6ab527 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1103,14 +1103,42 @@
                                 <&gcc GCC_SDCC1_ICE_CORE_CLK>;
                        clock-names = "core", "iface", "xo", "ice";
 
+                       interconnects = <&a2noc 2 &a2noc 10>,
+                                       <&gnoc 0 &cnoc 27>;
+                       interconnect-names = "sdhc1-ddr", "cpu-sdhc1";
+                       operating-points-v2 = <&sdhc1_opp_table>;
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&sdc1_state_on>;
                        pinctrl-1 = <&sdc1_state_off>;
+                       power-domains = <&rpmpd SDM660_VDDCX>;
 
                        bus-width = <8>;
                        non-removable;
 
                        status = "disabled";
+
+                       sdhc1_opp_table: opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-50000000 {
+                                       opp-hz = /bits/ 64 <50000000>;
+                                       required-opps = <&rpmpd_opp_low_svs>;
+                                       opp-peak-kBps = <200000 140000>;
+                                       opp-avg-kBps = <130718 133320>;
+                               };
+                               opp-100000000 {
+                                       opp-hz = /bits/ 64 <100000000>;
+                                       required-opps = <&rpmpd_opp_svs>;
+                                       opp-peak-kBps = <250000 160000>;
+                                       opp-avg-kBps = <196078 150000>;
+                               };
+                               opp-384000000 {
+                                       opp-hz = /bits/ 64 <384000000>;
+                                       required-opps = <&rpmpd_opp_nom>;
+                                       opp-peak-kBps = <4096000 4096000>;
+                                       opp-avg-kBps = <1338562 1338562>;
+                               };
+                       };
                };
 
                mmcc: clock-controller@c8c0000 {