arm64: dts: imx8mn-beacon-som: Enable QSPI on SOM

There is a QSPI chip connected to the FlexSPI bus.  Enable it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
index 2120e648539373e6ebbd7f955a38cbce005e65a2..de2cd0e3201c6dfb48123177082007b773c27089 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
@@ -7,6 +7,7 @@
        aliases {
                rtc0 = &rtc;
                rtc1 = &snvs_rtc;
+               spi0 = &flexspi;
        };
 
        usdhc1_pwrseq: usdhc1_pwrseq {
@@ -89,6 +90,22 @@
        };
 };
 
+&flexspi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexspi>;
+       status = "okay";
+
+       flash@0 {
+               reg = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               spi-max-frequency = <80000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
+       };
+};
+
 &i2c1 {
        clock-frequency = <400000>;
        pinctrl-names = "default";
@@ -318,6 +335,17 @@
                >;
        };
 
+       pinctrl_flexspi: flexspigrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_NAND_ALE_QSPI_A_SCLK               0x1c2
+                       MX8MN_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B            0x82
+                       MX8MN_IOMUXC_NAND_DATA00_QSPI_A_DATA0           0x82
+                       MX8MN_IOMUXC_NAND_DATA01_QSPI_A_DATA1           0x82
+                       MX8MN_IOMUXC_NAND_DATA02_QSPI_A_DATA2           0x82
+                       MX8MN_IOMUXC_NAND_DATA03_QSPI_A_DATA3           0x82
+               >;
+       };
+
        pinctrl_pmic: pmicirqgrp {
                fsl,pins = <
                        MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x141