arm64: dts: ls1088ardb: add QSGMII PHY nodes

Annotate the external MDIO1 node and describe the 8 QSGMII PHYs found on
the LS1088ARDB board and add phy-handles for DPMACs 3-10 to its
associated PHY.  Also, add the internal PCS MDIO nodes for the internal
MDIO buses found on the LS1088A SoC along with their internal PCS PHY
and link the corresponding DPMAC to the PCS through the pcs-handle.
Also, rename the dpmac@x nodes to ethernet@x in order to be compliant
with the naming convention used by ethernet controllers.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
index 5633e59febc3edcb4389b6195a2672144034c274..e28443ba263333619c4c93f434d758a65d3379fe 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -17,6 +17,98 @@
        compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
 };
 
+&dpmac3 {
+       phy-handle = <&mdio1_phy5>;
+       phy-connection-type = "qsgmii";
+       managed = "in-band-status";
+       pcs-handle = <&pcs3_0>;
+};
+
+&dpmac4 {
+       phy-handle = <&mdio1_phy6>;
+       phy-connection-type = "qsgmii";
+       managed = "in-band-status";
+       pcs-handle = <&pcs3_1>;
+};
+
+&dpmac5 {
+       phy-handle = <&mdio1_phy7>;
+       phy-connection-type = "qsgmii";
+       managed = "in-band-status";
+       pcs-handle = <&pcs3_2>;
+};
+
+&dpmac6 {
+       phy-handle = <&mdio1_phy8>;
+       phy-connection-type = "qsgmii";
+       managed = "in-band-status";
+       pcs-handle = <&pcs3_3>;
+};
+
+&dpmac7 {
+       phy-handle = <&mdio1_phy1>;
+       phy-connection-type = "qsgmii";
+       managed = "in-band-status";
+       pcs-handle = <&pcs7_0>;
+};
+
+&dpmac8 {
+       phy-handle = <&mdio1_phy2>;
+       phy-connection-type = "qsgmii";
+       managed = "in-band-status";
+       pcs-handle = <&pcs7_1>;
+};
+
+&dpmac9 {
+       phy-handle = <&mdio1_phy3>;
+       phy-connection-type = "qsgmii";
+       managed = "in-band-status";
+       pcs-handle = <&pcs7_2>;
+};
+
+&dpmac10 {
+       phy-handle = <&mdio1_phy4>;
+       phy-connection-type = "qsgmii";
+       managed = "in-band-status";
+       pcs-handle = <&pcs7_3>;
+};
+
+&emdio1 {
+       status = "okay";
+
+       mdio1_phy5: ethernet-phy@c {
+               reg = <0xc>;
+       };
+
+       mdio1_phy6: ethernet-phy@d {
+               reg = <0xd>;
+       };
+
+       mdio1_phy7: ethernet-phy@e {
+               reg = <0xe>;
+       };
+
+       mdio1_phy8: ethernet-phy@f {
+               reg = <0xf>;
+       };
+
+       mdio1_phy1: ethernet-phy@1c {
+               reg = <0x1c>;
+       };
+
+       mdio1_phy2: ethernet-phy@1d {
+               reg = <0x1d>;
+       };
+
+       mdio1_phy3: ethernet-phy@1e {
+               reg = <0x1e>;
+       };
+
+       mdio1_phy4: ethernet-phy@1f {
+               reg = <0x1f>;
+       };
+};
+
 &i2c0 {
        status = "okay";
 
@@ -87,6 +179,14 @@
        status = "okay";
 };
 
+&pcs_mdio3 {
+       status = "okay";
+};
+
+&pcs_mdio7 {
+       status = "okay";
+};
+
 &qspi {
        status = "okay";
 

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 42563c9c9e048a6b7ef27844fe8313a99bacdb74..80ed64cdb73e94b90ca1fe1a2925a714afcd5e97 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -690,6 +690,56 @@
                        status = "disabled";
                };
 
+               pcs_mdio3: mdio@8c0f000 {
+                       compatible = "fsl,fman-memac-mdio";
+                       reg = <0x0 0x8c0f000 0x0 0x1000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       pcs3_0: ethernet-phy@0 {
+                               reg = <0>;
+                       };
+
+                       pcs3_1: ethernet-phy@1 {
+                               reg = <1>;
+                       };
+
+                       pcs3_2: ethernet-phy@2 {
+                               reg = <2>;
+                       };
+
+                       pcs3_3: ethernet-phy@3 {
+                               reg = <3>;
+                       };
+               };
+
+               pcs_mdio7: mdio@8c1f000 {
+                       compatible = "fsl,fman-memac-mdio";
+                       reg = <0x0 0x8c1f000 0x0 0x1000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       pcs7_0: ethernet-phy@0 {
+                               reg = <0>;
+                       };
+
+                       pcs7_1: ethernet-phy@1 {
+                               reg = <1>;
+                       };
+
+                       pcs7_2: ethernet-phy@2 {
+                               reg = <2>;
+                       };
+
+                       pcs7_3: ethernet-phy@3 {
+                               reg = <3>;
+                       };
+               };
+
                cluster1_core0_watchdog: wdt@c000000 {
                        compatible = "arm,sp805-wdt", "arm,primecell";
                        reg = <0x0 0xc000000 0x0 0x1000>;
@@ -767,52 +817,52 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
 
-                               dpmac1: dpmac@1 {
+                               dpmac1: ethernet@1 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <1>;
                                };
 
-                               dpmac2: dpmac@2 {
+                               dpmac2: ethernet@2 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <2>;
                                };
 
-                               dpmac3: dpmac@3 {
+                               dpmac3: ethernet@3 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <3>;
                                };
 
-                               dpmac4: dpmac@4 {
+                               dpmac4: ethernet@4 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <4>;
                                };
 
-                               dpmac5: dpmac@5 {
+                               dpmac5: ethernet@5 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <5>;
                                };
 
-                               dpmac6: dpmac@6 {
+                               dpmac6: ethernet@6 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <6>;
                                };
 
-                               dpmac7: dpmac@7 {
+                               dpmac7: ethernet@7 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <7>;
                                };
 
-                               dpmac8: dpmac@8 {
+                               dpmac8: ethernet@8 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <8>;
                                };
 
-                               dpmac9: dpmac@9 {
+                               dpmac9: ethernet@9 {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <9>;
                                };
 
-                               dpmac10: dpmac@a {
+                               dpmac10: ethernet@a {
                                        compatible = "fsl,qoriq-mc-dpmac";
                                        reg = <0xa>;
                                };