arm64: dts: imx8mp: Enable HS400-ES
authorAdam Ford <aford173@gmail.com>
Sun, 10 Apr 2022 19:35:43 +0000 (14:35 -0500)
committerShawn Guo <shawnguo@kernel.org>
Mon, 18 Apr 2022 08:08:05 +0000 (16:08 +0800)
The SDHC controller in the imx8mp has the same controller
as the imx8mm which supports HS400-ES. Change the compatible
fallback to imx8mm to enable it, but keep the imx7d-usdhc
to prevent breaking backwards compatibility.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mp.dtsi

index c42d25bd16edfdffbcd1966d694542501c362fbc..7ad824e6b820f2d39af2dac1e7708d05b88a74ee 100644 (file)
                        };
 
                        usdhc1: mmc@30b40000 {
-                               compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc";
+                               compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
                                reg = <0x30b40000 0x10000>;
                                interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MP_CLK_DUMMY>,
                        };
 
                        usdhc2: mmc@30b50000 {
-                               compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc";
+                               compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
                                reg = <0x30b50000 0x10000>;
                                interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MP_CLK_DUMMY>,
                        };
 
                        usdhc3: mmc@30b60000 {
-                               compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc";
+                               compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
                                reg = <0x30b60000 0x10000>;
                                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk IMX8MP_CLK_DUMMY>,