struct e1000_hw *hw = &adapter->hw;
        u32 icr = er32(ICR);
 
-       /* read ICR disables interrupts using IAM, so keep up with our
-        * enable/disable accounting */
-       atomic_inc(&adapter->irq_sem);
+       /* read ICR disables interrupts using IAM */
 
        if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
                hw->mac.get_link_status = 1;
                adapter->total_rx_bytes = 0;
                adapter->total_rx_packets = 0;
                __netif_rx_schedule(netdev, &adapter->napi);
-       } else {
-               atomic_dec(&adapter->irq_sem);
        }
 
        return IRQ_HANDLED;
        if (!(icr & E1000_ICR_INT_ASSERTED))
                return IRQ_NONE;
 
-       /* Interrupt Auto-Mask...upon reading ICR,
-        * interrupts are masked.  No need for the
-        * IMC write, but it does mean we should
-        * account for it ASAP. */
-       atomic_inc(&adapter->irq_sem);
+       /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
+        * need for the IMC write */
 
        if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
                hw->mac.get_link_status = 1;
                adapter->total_rx_bytes = 0;
                adapter->total_rx_packets = 0;
                __netif_rx_schedule(netdev, &adapter->napi);
-       } else {
-               atomic_dec(&adapter->irq_sem);
        }
 
        return IRQ_HANDLED;
 {
        struct e1000_hw *hw = &adapter->hw;
 
-       atomic_inc(&adapter->irq_sem);
        ew32(IMC, ~0);
        e1e_flush();
        synchronize_irq(adapter->pdev->irq);
 {
        struct e1000_hw *hw = &adapter->hw;
 
-       if (atomic_dec_and_test(&adapter->irq_sem)) {
-               ew32(IMS, IMS_ENABLE_MASK);
-               e1e_flush();
-       }
+       ew32(IMS, IMS_ENABLE_MASK);
+       e1e_flush();
 }
 
 /**
        struct e1000_hw *hw = &adapter->hw;
        u32 vfta, index;
 
-       e1000_irq_disable(adapter);
+       if (!test_bit(__E1000_DOWN, &adapter->state))
+               e1000_irq_disable(adapter);
        vlan_group_set_device(adapter->vlgrp, vid, NULL);
-       e1000_irq_enable(adapter);
+
+       if (!test_bit(__E1000_DOWN, &adapter->state))
+               e1000_irq_enable(adapter);
 
        if ((adapter->hw.mng_cookie.status &
             E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
        struct e1000_hw *hw = &adapter->hw;
        u32 ctrl, rctl;
 
-       e1000_irq_disable(adapter);
+       if (!test_bit(__E1000_DOWN, &adapter->state))
+               e1000_irq_disable(adapter);
        adapter->vlgrp = grp;
 
        if (grp) {
                }
        }
 
-       e1000_irq_enable(adapter);
+       if (!test_bit(__E1000_DOWN, &adapter->state))
+               e1000_irq_enable(adapter);
 }
 
 static void e1000_restore_vlan(struct e1000_adapter *adapter)
        msleep(10);
 
        napi_disable(&adapter->napi);
-       atomic_set(&adapter->irq_sem, 0);
        e1000_irq_disable(adapter);
 
        del_timer_sync(&adapter->watchdog_timer);
        spin_lock_init(&adapter->tx_queue_lock);
 
        /* Explicitly disable IRQ since the NIC can be in any state. */
-       atomic_set(&adapter->irq_sem, 0);
        e1000_irq_disable(adapter);
 
        spin_lock_init(&adapter->stats_lock);