clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Tue, 19 Dec 2023 18:55:33 +0000 (19:55 +0100)
committerBjorn Andersson <andersson@kernel.org>
Tue, 19 Dec 2023 20:12:41 +0000 (14:12 -0600)
These values were missing. Add them.

Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller driver")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231219-topic-8650_clks-v1-2-5672bfa0eb05@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/dispcc-sm8650.c

index 6283099faf57c53669c1075ad488f458da731f1a..f3b1d9d16baeab189efaa7387b1f4970cb711150 100644 (file)
@@ -79,6 +79,10 @@ static const struct alpha_pll_config disp_cc_pll0_config = {
        .config_ctl_val = 0x20485699,
        .config_ctl_hi_val = 0x00182261,
        .config_ctl_hi1_val = 0x82aa299c,
+       .test_ctl_val = 0x00000000,
+       .test_ctl_hi_val = 0x00000003,
+       .test_ctl_hi1_val = 0x00009000,
+       .test_ctl_hi2_val = 0x00000034,
        .user_ctl_val = 0x00000000,
        .user_ctl_hi_val = 0x00000005,
 };
@@ -106,6 +110,10 @@ static const struct alpha_pll_config disp_cc_pll1_config = {
        .config_ctl_val = 0x20485699,
        .config_ctl_hi_val = 0x00182261,
        .config_ctl_hi1_val = 0x82aa299c,
+       .test_ctl_val = 0x00000000,
+       .test_ctl_hi_val = 0x00000003,
+       .test_ctl_hi1_val = 0x00009000,
+       .test_ctl_hi2_val = 0x00000034,
        .user_ctl_val = 0x00000000,
        .user_ctl_hi_val = 0x00000005,
 };