drm/amd/display: Update hubbub description comment

Description for DCHUBBUB_TEST_DEBUG_DATA is changed to avoid any future confusions.

Signed-off-by: Peikang Zhang <peikang.zhang@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
index f36a0d8cedfe1eec4b8db2766ca401991200ad41..870735deaca718bc9e08a165b02fbc390ead3310 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
@@ -147,8 +147,9 @@ bool hubbub1_verify_allow_pstate_change_high(
                forced_pstate_allow = false;
        }
 
-       /* RV2:
-        * dchubbubdebugind, at: 0xB
+       /* The following table only applies to DCN1 and DCN2,
+        * for newer DCNs, need to consult with HW IP folks to read RTL
+        * HUBBUB:DCHUBBUB_TEST_ARB_DEBUG10 DCHUBBUBDEBUGIND:0xB
         * description
         * 0:     Pipe0 Plane0 Allow Pstate Change
         * 1:     Pipe0 Plane1 Allow Pstate Change
@@ -181,64 +182,6 @@ bool hubbub1_verify_allow_pstate_change_high(
         * 28:    WB0 Allow Pstate Change
         * 29:    WB1 Allow Pstate Change
         * 30:    Arbiter's allow_pstate_change
-        * 31:    SOC pstate change request"
-        */
-       /*DCN2.x:
-       HUBBUB:DCHUBBUB_TEST_ARB_DEBUG10 DCHUBBUBDEBUGIND:0xB
-       0: Pipe0 Plane0 Allow P-state Change
-       1: Pipe0 Plane1 Allow P-state Change
-       2: Pipe0 Cursor0 Allow P-state Change
-       3: Pipe0 Cursor1 Allow P-state Change
-       4: Pipe1 Plane0 Allow P-state Change
-       5: Pipe1 Plane1 Allow P-state Change
-       6: Pipe1 Cursor0 Allow P-state Change
-       7: Pipe1 Cursor1 Allow P-state Change
-       8: Pipe2 Plane0 Allow P-state Change
-       9: Pipe2 Plane1 Allow P-state Change
-       10: Pipe2 Cursor0 Allow P-state Change
-       11: Pipe2 Cursor1 Allow P-state Change
-       12: Pipe3 Plane0 Allow P-state Change
-       13: Pipe3 Plane1 Allow P-state Change
-       14: Pipe3 Cursor0 Allow P-state Change
-       15: Pipe3 Cursor1 Allow P-state Change
-       16: Pipe4 Plane0 Allow P-state Change
-       17: Pipe4 Plane1 Allow P-state Change
-       18: Pipe4 Cursor0 Allow P-state Change
-       19: Pipe4 Cursor1 Allow P-state Change
-       20: Pipe5 Plane0 Allow P-state Change
-       21: Pipe5 Plane1 Allow P-state Change
-       22: Pipe5 Cursor0 Allow P-state Change
-       23: Pipe5 Cursor1 Allow P-state Change
-       24: Pipe6 Plane0 Allow P-state Change
-       25: Pipe6 Plane1 Allow P-state Change
-       26: Pipe6 Cursor0 Allow P-state Change
-       27: Pipe6 Cursor1 Allow P-state Change
-       28: WB0 Allow P-state Change
-       29: WB1 Allow P-state Change
-       30: Arbiter`s Allow P-state Change
-       31: SOC P-state Change request
-       */
-       /* RV1:
-        * dchubbubdebugind, at: 0x7
-        * description "3-0:   Pipe0 cursor0 QOS
-        * 7-4:   Pipe1 cursor0 QOS
-        * 11-8:  Pipe2 cursor0 QOS
-        * 15-12: Pipe3 cursor0 QOS
-        * 16:    Pipe0 Plane0 Allow Pstate Change
-        * 17:    Pipe1 Plane0 Allow Pstate Change
-        * 18:    Pipe2 Plane0 Allow Pstate Change
-        * 19:    Pipe3 Plane0 Allow Pstate Change
-        * 20:    Pipe0 Plane1 Allow Pstate Change
-        * 21:    Pipe1 Plane1 Allow Pstate Change
-        * 22:    Pipe2 Plane1 Allow Pstate Change
-        * 23:    Pipe3 Plane1 Allow Pstate Change
-        * 24:    Pipe0 cursor0 Allow Pstate Change
-        * 25:    Pipe1 cursor0 Allow Pstate Change
-        * 26:    Pipe2 cursor0 Allow Pstate Change
-        * 27:    Pipe3 cursor0 Allow Pstate Change
-        * 28:    WB0 Allow Pstate Change
-        * 29:    WB1 Allow Pstate Change
-        * 30:    Arbiter's allow_pstate_change
         * 31:    SOC pstate change request
         */