nvme-pci: limit max_hw_sectors based on the DMA max mapping size

When running a NVMe device that is attached to a addressing
challenged PCIe root port that requires bounce buffering, our
request sizes can easily overflow the swiotlb bounce buffer
size.  Limit the maximum I/O size to the limit exposed by
the DMA mapping subsystem.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reported-by: Atish Patra <Atish.Patra@wdc.com>
Tested-by: Atish Patra <Atish.Patra@wdc.com>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index ac2011b8dac11e2077408416c5f7afd0ccdf87ae..bb970ca82517b1213cb4922225822edb78e23b4d 100644 (file)
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -2503,7 +2503,8 @@ static void nvme_reset_work(struct work_struct *work)
         * Limit the max command size to prevent iod->sg allocations going
         * over a single page.
         */
-       dev->ctrl.max_hw_sectors = NVME_MAX_KB_SZ << 1;
+       dev->ctrl.max_hw_sectors = min_t(u32,
+               NVME_MAX_KB_SZ << 1, dma_max_mapping_size(dev->dev) >> 9);
        dev->ctrl.max_segments = NVME_MAX_SEGS;
 
        /*