drm/radeon: Clean up errors in ni.c
authorGuoHua Chen <chenguohua_716@163.com>
Thu, 11 Jan 2024 07:41:27 +0000 (07:41 +0000)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 18 Jan 2024 20:38:54 +0000 (15:38 -0500)
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: trailing statements should be on next line

Signed-off-by: GuoHua Chen <chenguohua_716@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/ni.c

index 927e5f42e97d018240b5204c9d0dd7339391292a..6f231a740ba531d1f646ee665350882593f12f29 100644 (file)
@@ -66,8 +66,7 @@ void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v)
        spin_unlock_irqrestore(&rdev->smc_idx_lock, flags);
 }
 
-static const u32 tn_rlc_save_restore_register_list[] =
-{
+static const u32 tn_rlc_save_restore_register_list[] = {
        0x98fc,
        0x98f0,
        0x9834,
@@ -216,8 +215,7 @@ MODULE_FIRMWARE("radeon/ARUBA_me.bin");
 MODULE_FIRMWARE("radeon/ARUBA_rlc.bin");
 
 
-static const u32 cayman_golden_registers2[] =
-{
+static const u32 cayman_golden_registers2[] = {
        0x3e5c, 0xffffffff, 0x00000000,
        0x3e48, 0xffffffff, 0x00000000,
        0x3e4c, 0xffffffff, 0x00000000,
@@ -226,8 +224,7 @@ static const u32 cayman_golden_registers2[] =
        0x3e60, 0xffffffff, 0x00000000
 };
 
-static const u32 cayman_golden_registers[] =
-{
+static const u32 cayman_golden_registers[] = {
        0x5eb4, 0xffffffff, 0x00000002,
        0x5e78, 0x8f311ff1, 0x001000f0,
        0x3f90, 0xffff0000, 0xff000000,
@@ -267,16 +264,14 @@ static const u32 cayman_golden_registers[] =
        0x8974, 0xffffffff, 0x00000000
 };
 
-static const u32 dvst_golden_registers2[] =
-{
+static const u32 dvst_golden_registers2[] = {
        0x8f8, 0xffffffff, 0,
        0x8fc, 0x00380000, 0,
        0x8f8, 0xffffffff, 1,
        0x8fc, 0x0e000000, 0
 };
 
-static const u32 dvst_golden_registers[] =
-{
+static const u32 dvst_golden_registers[] = {
        0x690, 0x3fff3fff, 0x20c00033,
        0x918c, 0x0fff0fff, 0x00010006,
        0x91a8, 0x0fff0fff, 0x00010006,
@@ -333,8 +328,7 @@ static const u32 dvst_golden_registers[] =
        0x8974, 0xffffffff, 0x00000000
 };
 
-static const u32 scrapper_golden_registers[] =
-{
+static const u32 scrapper_golden_registers[] = {
        0x690, 0x3fff3fff, 0x20c00033,
        0x918c, 0x0fff0fff, 0x00010006,
        0x918c, 0x0fff0fff, 0x00010006,
@@ -754,7 +748,8 @@ int ni_init_microcode(struct radeon_device *rdev)
                rlc_req_size = ARUBA_RLC_UCODE_SIZE * 4;
                mc_req_size = 0;
                break;
-       default: BUG();
+       default:
+               BUG();
        }
 
        DRM_INFO("Loading %s Microcode\n", chip_name);