dmaengine: fsl-edma: clean up unused "fsl,imx8qm-adma" compatible string
authorJoy Zou <joy.zou@nxp.com>
Wed, 24 Apr 2024 06:45:07 +0000 (14:45 +0800)
committerVinod Koul <vkoul@kernel.org>
Thu, 25 Apr 2024 09:02:28 +0000 (14:32 +0530)
The eDMA hardware issue only exist imx8QM A0. A0 never mass production.
So remove the workaround safely.

Signed-off-by: Joy Zou <joy.zou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20240424064508.1886764-2-joy.zou@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/fsl-edma-common.c
drivers/dma/fsl-edma-common.h
drivers/dma/fsl-edma-main.c

index 73628eac8aadccfa56c06dcaa59088f909caba14..d62f5f452a4304c30937426a611a3d8b0f1754be 100644 (file)
@@ -76,18 +76,10 @@ static void fsl_edma3_enable_request(struct fsl_edma_chan *fsl_chan)
 
        flags = fsl_edma_drvflags(fsl_chan);
        val = edma_readl_chreg(fsl_chan, ch_sbr);
-       /* Remote/local swapped wrongly on iMX8 QM Audio edma */
-       if (flags & FSL_EDMA_DRV_QUIRK_SWAPPED) {
-               if (!fsl_chan->is_rxchan)
-                       val |= EDMA_V3_CH_SBR_RD;
-               else
-                       val |= EDMA_V3_CH_SBR_WR;
-       } else {
-               if (fsl_chan->is_rxchan)
-                       val |= EDMA_V3_CH_SBR_RD;
-               else
-                       val |= EDMA_V3_CH_SBR_WR;
-       }
+       if (fsl_chan->is_rxchan)
+               val |= EDMA_V3_CH_SBR_RD;
+       else
+               val |= EDMA_V3_CH_SBR_WR;
 
        if (fsl_chan->is_remote)
                val &= ~(EDMA_V3_CH_SBR_RD | EDMA_V3_CH_SBR_WR);
index 01157912bfd5f6f31d2beca0f2e43462f1c91ec8..3f93ebb890b359b991a10b526db08a3cc282b0b1 100644 (file)
@@ -194,8 +194,6 @@ struct fsl_edma_desc {
 #define FSL_EDMA_DRV_HAS_PD            BIT(5)
 #define FSL_EDMA_DRV_HAS_CHCLK         BIT(6)
 #define FSL_EDMA_DRV_HAS_CHMUX         BIT(7)
-/* imx8 QM audio edma remote local swapped */
-#define FSL_EDMA_DRV_QUIRK_SWAPPED     BIT(8)
 /* control and status register is in tcd address space, edma3 reg layout */
 #define FSL_EDMA_DRV_SPLIT_REG         BIT(9)
 #define FSL_EDMA_DRV_BUS_8BYTE         BIT(10)
index de03148aed0b3ba6205f70bec6f089d0d1ff1a89..391e4f13dfeb036cb2db4e04878fc55401799f52 100644 (file)
@@ -348,13 +348,6 @@ static struct fsl_edma_drvdata imx8qm_data = {
        .setup_irq = fsl_edma3_irq_init,
 };
 
-static struct fsl_edma_drvdata imx8qm_audio_data = {
-       .flags = FSL_EDMA_DRV_QUIRK_SWAPPED | FSL_EDMA_DRV_HAS_PD | FSL_EDMA_DRV_EDMA3,
-       .chreg_space_sz = 0x10000,
-       .chreg_off = 0x10000,
-       .setup_irq = fsl_edma3_irq_init,
-};
-
 static struct fsl_edma_drvdata imx8ulp_data = {
        .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_CHCLK | FSL_EDMA_DRV_HAS_DMACLK |
                 FSL_EDMA_DRV_EDMA3,
@@ -396,7 +389,6 @@ static const struct of_device_id fsl_edma_dt_ids[] = {
        { .compatible = "fsl,ls1028a-edma", .data = &ls1028a_data},
        { .compatible = "fsl,imx7ulp-edma", .data = &imx7ulp_data},
        { .compatible = "fsl,imx8qm-edma", .data = &imx8qm_data},
-       { .compatible = "fsl,imx8qm-adma", .data = &imx8qm_audio_data},
        { .compatible = "fsl,imx8ulp-edma", .data = &imx8ulp_data},
        { .compatible = "fsl,imx93-edma3", .data = &imx93_data3},
        { .compatible = "fsl,imx93-edma4", .data = &imx93_data4},