clk: qcom: gdsc: add support for collapse-vote registers
authorJohan Hovold <johan+linaro@kernel.org>
Fri, 20 May 2022 10:09:47 +0000 (12:09 +0200)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Sun, 26 Jun 2022 03:38:02 +0000 (22:38 -0500)
Recent Qualcomm platforms have APCS collapse-vote registers that allow
for sharing GDSCs with other masters (e.g. LPASS).

Add support for using such vote registers instead of the control
register when updating the GDSC power state.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220520100948.19622-3-johan+linaro@kernel.org
drivers/clk/qcom/gdsc.c
drivers/clk/qcom/gdsc.h

index c676416e685fbf0008f989c5d234192c2bb712f8..6f746158d28fc057fb544e6457e9fa5a9a1578de 100644 (file)
@@ -137,8 +137,13 @@ static int gdsc_update_collapse_bit(struct gdsc *sc, bool val)
        u32 reg, mask;
        int ret;
 
-       reg = sc->gdscr;
-       mask = SW_COLLAPSE_MASK;
+       if (sc->collapse_mask) {
+               reg = sc->collapse_ctrl;
+               mask = sc->collapse_mask;
+       } else {
+               reg = sc->gdscr;
+               mask = SW_COLLAPSE_MASK;
+       }
 
        ret = regmap_update_bits(sc->regmap, reg, mask, val ? mask : 0);
        if (ret)
index ad313d7210bd32a35103bc1ac3aeb4326e01d661..5de48c9439b29af03d208bef151a61f0d024bee6 100644 (file)
@@ -18,6 +18,8 @@ struct reset_controller_dev;
  * @pd: generic power domain
  * @regmap: regmap for MMIO accesses
  * @gdscr: gsdc control register
+ * @collapse_ctrl: APCS collapse-vote register
+ * @collapse_mask: APCS collapse-vote mask
  * @gds_hw_ctrl: gds_hw_ctrl register
  * @cxcs: offsets of branch registers to toggle mem/periph bits in
  * @cxc_count: number of @cxcs
@@ -35,6 +37,8 @@ struct gdsc {
        struct generic_pm_domain        *parent;
        struct regmap                   *regmap;
        unsigned int                    gdscr;
+       unsigned int                    collapse_ctrl;
+       unsigned int                    collapse_mask;
        unsigned int                    gds_hw_ctrl;
        unsigned int                    clamp_io_ctrl;
        unsigned int                    *cxcs;