drm/amd/display: add plane blend LUT and TF support

Map plane blend properties to DPP blend gamma. Plane blend is a
post-3D LUT curve that linearizes color space for blending. It may be
defined by a user-blob LUT and/or predefined transfer function. As
hardcoded curve (ROM) is not supported on blend gamma, we use AMD color
module to fill parameters when setting non-linear TF with empty LUT.

v2:
- rename DRM TFs to AMDGPU TFs

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 131174c17cf04fad3c272477f3c60b2c84406c16..7fd85ec7f8114839f04145c6db32f2c8764ac80c 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8271,6 +8271,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                        bundle->surface_updates[planes_count].hdr_mult = dc_plane->hdr_mult;
                        bundle->surface_updates[planes_count].func_shaper = dc_plane->in_shaper_func;
                        bundle->surface_updates[planes_count].lut3d_func = dc_plane->lut3d_func;
+                       bundle->surface_updates[planes_count].blend_tf = dc_plane->blend_tf;
                }
 
                amdgpu_dm_plane_fill_dc_scaling_info(dm->adev, new_plane_state,

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index 73839953843227f2e46cfdb467b422508872f5b7..27ddc657671973df9681f245796991f2dc00e8dc 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -733,6 +733,35 @@ static int amdgpu_dm_atomic_shaper_lut(const struct drm_color_lut *shaper_lut,
        return ret;
 }
 
+static int amdgpu_dm_atomic_blend_lut(const struct drm_color_lut *blend_lut,
+                                      bool has_rom,
+                                      enum dc_transfer_func_predefined tf,
+                                      uint32_t blend_size,
+                                      struct dc_transfer_func *func_blend)
+{
+       int ret = 0;
+
+       if (blend_size || tf != TRANSFER_FUNCTION_LINEAR) {
+               /*
+                * DRM plane gamma LUT or TF means we are linearizing color
+                * space before blending (similar to degamma programming). As
+                * we don't have hardcoded curve support, or we use AMD color
+                * module to fill the parameters that will be translated to HW
+                * points.
+                */
+               func_blend->type = TF_TYPE_DISTRIBUTED_POINTS;
+               func_blend->tf = tf;
+               func_blend->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+
+               ret = __set_input_tf(func_blend, blend_lut, blend_size);
+       } else {
+               func_blend->type = TF_TYPE_BYPASS;
+               func_blend->tf = TRANSFER_FUNCTION_LINEAR;
+       }
+
+       return ret;
+}
+
 /**
  * amdgpu_dm_verify_lut3d_size - verifies if 3D LUT is supported and if user
  * shaper and 3D LUTs match the hw supported size
@@ -1071,8 +1100,9 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state,
 {
        struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
        enum amdgpu_transfer_function shaper_tf = AMDGPU_TRANSFER_FUNCTION_DEFAULT;
-       const struct drm_color_lut *shaper_lut, *lut3d;
-       uint32_t shaper_size, lut3d_size;
+       enum amdgpu_transfer_function blend_tf = AMDGPU_TRANSFER_FUNCTION_DEFAULT;
+       const struct drm_color_lut *shaper_lut, *lut3d, *blend_lut;
+       uint32_t shaper_size, lut3d_size, blend_size;
        int ret;
 
        dc_plane_state->hdr_mult = dc_fixpt_from_s3132(dm_plane_state->hdr_mult);
@@ -1088,12 +1118,30 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state,
                                          amdgpu_tf_to_dc_tf(shaper_tf),
                                          shaper_size,
                                          dc_plane_state->in_shaper_func);
-       if (ret)
+       if (ret) {
                drm_dbg_kms(plane_state->plane->dev,
                            "setting plane %d shaper LUT failed.\n",
                            plane_state->plane->index);
 
-       return ret;
+               return ret;
+       }
+
+       blend_tf = dm_plane_state->blend_tf;
+       blend_lut = __extract_blob_lut(dm_plane_state->blend_lut, &blend_size);
+       blend_size = blend_lut != NULL ? blend_size : 0;
+
+       ret = amdgpu_dm_atomic_blend_lut(blend_lut, false,
+                                        amdgpu_tf_to_dc_tf(blend_tf),
+                                        blend_size, dc_plane_state->blend_tf);
+       if (ret) {
+               drm_dbg_kms(plane_state->plane->dev,
+                           "setting plane %d gamma lut failed.\n",
+                           plane_state->plane->index);
+
+               return ret;
+       }
+
+       return 0;
 }
 
 /**