ARM: dts: broadcom: bcmbca: Add spi controller node

Add support for HSSPI controller in ARMv7 chip dts files.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-4-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

diff --git a/arch/arm/boot/dts/bcm47622.dtsi b/arch/arm/boot/dts/bcm47622.dtsi
index f4b2db9bc4ab52186ec2b03d25b9e48d622367dd..cd25ed2757b70dafa2db5d3df9298e0792f207f0 100644 (file)
--- a/arch/arm/boot/dts/bcm47622.dtsi
+++ b/arch/arm/boot/dts/bcm47622.dtsi
@@ -88,6 +88,12 @@
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
        };
 
        psci {
@@ -119,6 +125,18 @@
                #size-cells = <1>;
                ranges = <0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm47622-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;

diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index b774a8d63813fa085c01e53ef3b8624e3fd79a05..93281c47c9ba9ff02d8f39a297cb2d6d902e026b 100644 (file)
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -66,6 +66,12 @@
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <400000000>;
+               };
        };
 
        /* ARM bus */
@@ -203,6 +209,18 @@
                        status = "disabled";
                };
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm63138-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                nand_controller: nand-controller@2000 {
                        #address-cells = <1>;
                        #size-cells = <0>;

diff --git a/arch/arm/boot/dts/bcm63148.dtsi b/arch/arm/boot/dts/bcm63148.dtsi
index 7cd55d64de714f32a905f77fc1f099e8a036597c..ba7f265db1210038102f456659a07a8654552240 100644 (file)
--- a/arch/arm/boot/dts/bcm63148.dtsi
+++ b/arch/arm/boot/dts/bcm63148.dtsi
@@ -60,6 +60,12 @@
                        #clock-cells = <0>;
                        clock-frequency = <50000000>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <400000000>;
+               };
        };
 
        psci {
@@ -100,5 +106,17 @@
                        clock-names = "refclk";
                        status = "disabled";
                };
+
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm63148-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
        };
 };

diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi
index 043e699cbc277edb39e155f958c559ec39416730..d8268a1e889bbdbaeb79d9b82d83514fbd7735e7 100644 (file)
--- a/arch/arm/boot/dts/bcm63178.dtsi
+++ b/arch/arm/boot/dts/bcm63178.dtsi
@@ -71,6 +71,7 @@
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
                uart_clk: uart-clk {
                        compatible = "fixed-factor-clock";
                        #clock-cells = <0>;
@@ -78,6 +79,12 @@
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
        };
 
        psci {
@@ -109,6 +116,18 @@
                #size-cells = <1>;
                ranges = <0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm63178-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;

diff --git a/arch/arm/boot/dts/bcm6756.dtsi b/arch/arm/boot/dts/bcm6756.dtsi
index 5c72219bc194d8e7a789095d47929fcf00b2f7e9..49ecc1f0c18c5f1d703e8f116412a8869f617111 100644 (file)
--- a/arch/arm/boot/dts/bcm6756.dtsi
+++ b/arch/arm/boot/dts/bcm6756.dtsi
@@ -88,6 +88,12 @@
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
        };
 
        psci {
@@ -119,6 +125,19 @@
                #size-cells = <1>;
                ranges = <0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm6756-hsspi", "brcm,bcmbca-hsspi-v1.1";
+                       reg = <0x1000 0x600>, <0x2610 0x4>;
+                       reg-names = "hsspi", "spim-ctrl";
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;

diff --git a/arch/arm/boot/dts/bcm6846.dtsi b/arch/arm/boot/dts/bcm6846.dtsi
index 81513a793815971c347e9446ee0b9c2eb6e9e304..fbc7d3a5dc5f1c04aa5c3e1946b4d2bb9cd3fc45 100644 (file)
--- a/arch/arm/boot/dts/bcm6846.dtsi
+++ b/arch/arm/boot/dts/bcm6846.dtsi
@@ -61,6 +61,12 @@
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <400000000>;
+               };
        };
 
        psci {
@@ -100,5 +106,17 @@
                        clock-names = "refclk";
                        status = "disabled";
                };
+
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm6846-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
        };
 };

diff --git a/arch/arm/boot/dts/bcm6855.dtsi b/arch/arm/boot/dts/bcm6855.dtsi
index 5fa5feac0e297a26a9f9f58bf7e8aba5ecefd772..5e0fe26530f18a53195dc42146328f053cc1dfa3 100644 (file)
--- a/arch/arm/boot/dts/bcm6855.dtsi
+++ b/arch/arm/boot/dts/bcm6855.dtsi
@@ -78,6 +78,12 @@
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
        };
 
        psci {
@@ -109,6 +115,19 @@
                #size-cells = <1>;
                ranges = <0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm6855-hsspi", "brcm,bcmbca-hsspi-v1.1";
+                       reg = <0x1000 0x600>, <0x2610 0x4>;
+                       reg-names = "hsspi", "spim-ctrl";
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;

diff --git a/arch/arm/boot/dts/bcm6878.dtsi b/arch/arm/boot/dts/bcm6878.dtsi
index 4ec836ac4baf838df4e74f3804a752c52131bd89..96529d3d4dc26990ecc68997ea3b25be7d0dace5 100644 (file)
--- a/arch/arm/boot/dts/bcm6878.dtsi
+++ b/arch/arm/boot/dts/bcm6878.dtsi
@@ -61,6 +61,7 @@
                        #clock-cells = <0>;
                        clock-frequency = <200000000>;
                };
+
                uart_clk: uart-clk {
                        compatible = "fixed-factor-clock";
                        #clock-cells = <0>;
@@ -68,6 +69,12 @@
                        clock-div = <4>;
                        clock-mult = <1>;
                };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
        };
 
        psci {
@@ -100,6 +107,18 @@
                #size-cells = <1>;
                ranges = <0 0xff800000 0x800000>;
 
+               hsspi: spi@1000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm6878-hsspi", "brcm,bcmbca-hsspi-v1.0";
+                       reg = <0x1000 0x600>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&hsspi_pll &hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
                uart0: serial@12000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x12000 0x1000>;

diff --git a/arch/arm/boot/dts/bcm947622.dts b/arch/arm/boot/dts/bcm947622.dts
index 6f083724ab8ea3989dfb55e3d04f5f9b5613c2df..93b8ce22678d3ace8ade0cf148d413120369197b 100644 (file)
--- a/arch/arm/boot/dts/bcm947622.dts
+++ b/arch/arm/boot/dts/bcm947622.dts
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/bcm963138.dts b/arch/arm/boot/dts/bcm963138.dts
index d28c4f130ca24cf702f73dbeb696faa4341a2ecf..1b405c2492137a9af8fc38234e06f7b1183c404c 100644 (file)
--- a/arch/arm/boot/dts/bcm963138.dts
+++ b/arch/arm/boot/dts/bcm963138.dts
@@ -25,3 +25,7 @@
 &serial0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts
index 15bec75be74cf315a76285a0f1c8d6bc2a9fc19a..b5af61853a0726089c71703aa831e1e9c3520f36 100644 (file)
--- a/arch/arm/boot/dts/bcm963138dvt.dts
+++ b/arch/arm/boot/dts/bcm963138dvt.dts
@@ -50,3 +50,7 @@
 &sata_phy {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/bcm963148.dts b/arch/arm/boot/dts/bcm963148.dts
index 98f6a6d09f50c1436d878d2f3315075b94be3c8c..1f5d6d783f090f0e92983b1138551139246fb6bb 100644 (file)
--- a/arch/arm/boot/dts/bcm963148.dts
+++ b/arch/arm/boot/dts/bcm963148.dts
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/bcm963178.dts b/arch/arm/boot/dts/bcm963178.dts
index fa096e9cde2305482ef42f86c719abde4aa7c8cf..d036e99dd8d16e526def14b030aa1543890a5284 100644 (file)
--- a/arch/arm/boot/dts/bcm963178.dts
+++ b/arch/arm/boot/dts/bcm963178.dts
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/bcm96756.dts b/arch/arm/boot/dts/bcm96756.dts
index 9a4a87ba9c8a1f21bffaaf2b6c9614bacc2e2d4d..8b104f3fb14ae76ff16f0bbd47e63e5762ef0c83 100644 (file)
--- a/arch/arm/boot/dts/bcm96756.dts
+++ b/arch/arm/boot/dts/bcm96756.dts
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/bcm96846.dts b/arch/arm/boot/dts/bcm96846.dts
index c70ebccabc197e74f7a9ede8b97f78e0b16cd002..55852c2296087e79bba798dacab2829d0630e14d 100644 (file)
--- a/arch/arm/boot/dts/bcm96846.dts
+++ b/arch/arm/boot/dts/bcm96846.dts
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/bcm96855.dts b/arch/arm/boot/dts/bcm96855.dts
index 4438152561acf90891edbcc223779e86a114666b..2ad880af210440c67c26bdad3f22abf27caf11f2 100644 (file)
--- a/arch/arm/boot/dts/bcm96855.dts
+++ b/arch/arm/boot/dts/bcm96855.dts
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/bcm96878.dts b/arch/arm/boot/dts/bcm96878.dts
index 8fbc175cb452a13841209d863e17ed535ca4c462..b7af8ade7a9d009ca70e80aec4df148ddd23e285 100644 (file)
--- a/arch/arm/boot/dts/bcm96878.dts
+++ b/arch/arm/boot/dts/bcm96878.dts
@@ -28,3 +28,7 @@
 &uart0 {
        status = "okay";
 };
+
+&hsspi {
+       status = "okay";
+};