i2c: riic: avoid potential division by zero
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Wed, 6 Sep 2023 20:00:23 +0000 (22:00 +0200)
committerWolfram Sang <wsa@kernel.org>
Tue, 19 Sep 2023 09:11:09 +0000 (11:11 +0200)
Value comes from DT, so it could be 0. Unlikely, but could be.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
drivers/i2c/busses/i2c-riic.c

index f0ee8871d5ae1b2c1b2f127de0a7e03221c93812..e43ff483c56ece3a757fd8d0a2fce70e5e15b741 100644 (file)
@@ -313,7 +313,7 @@ static int riic_init_hw(struct riic_dev *riic, struct i2c_timings *t)
         * frequency with only 62 clock ticks max (31 high, 31 low).
         * Aim for a duty of 60% LOW, 40% HIGH.
         */
-       total_ticks = DIV_ROUND_UP(rate, t->bus_freq_hz);
+       total_ticks = DIV_ROUND_UP(rate, t->bus_freq_hz ?: 1);
 
        for (cks = 0; cks < 7; cks++) {
                /*