}
}
-/* antenna mapping info */
-/* 1: right-side antenna */
-/* 2/0: left-side antenna */
-/* PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1 */
-/* PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2 */
-/* We select left antenna as default antenna in initial process, modify it as needed */
-/* */
-
void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
{
if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
{
- struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
u8 i, Max_spatial_stream;
s8 rx_pwr[4], rx_pwr_all = 0;
u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
}
- /* For 92C/92D HW (Hybrid) Antenna Diversity */
- pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
/* For 88E HW Antenna Diversity */
dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
#define ODM_ASSOCIATE_ENTRY_NUM 32 /* Max size of AsocEntry[]. */
-/* This indicates two different steps. */
-/* Using SWAW_STEP_PEAK, driver needs to switch antenna and listen to
- * the signal on the air. */
-
-#define SWAW_STEP_PEAK 0
-
struct sw_ant_switch {
u8 try_flag;
s32 PreRSSI;
/* Before link Antenna Switch check */
u8 SWAS_NoLink_State;
u32 SWAS_NoLink_BK_Reg860;
- bool ANTA_ON; /* To indicate Ant A is or not */
- bool ANTB_ON; /* To indicate Ant B is on or not */
s32 RSSI_sum_A;
s32 RSSI_sum_B;
u64 RXByteCnt_B;
u8 TrafficLoad;
struct timer_list SwAntennaSwitchTimer;
- /* Hybrid Antenna Diversity */
- u32 CCK_Ant1_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u32 CCK_Ant2_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u32 OFDM_Ant1_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u32 OFDM_Ant2_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u32 RSSI_Ant1_Sum[ODM_ASSOCIATE_ENTRY_NUM];
- u32 RSSI_Ant2_Sum[ODM_ASSOCIATE_ENTRY_NUM];
u8 TxAnt[ODM_ASSOCIATE_ENTRY_NUM];
u8 TargetSTA;
- u8 antsel;
u8 RxIdleAnt;
};
CGCS_RX_HW_ANTDIV = 0x02,
FIXED_HW_ANTDIV = 0x03,
CG_TRX_SMART_ANTDIV = 0x04,
- CGCS_RX_SW_ANTDIV = 0x05,
};
/* Copy from SD4 defined structure. We use to support PHY DM integration. */