.disable_hpd = dcn10_link_encoder_disable_hpd,
        .is_dig_enabled = dcn10_is_dig_enabled,
        .get_dig_frontend = dcn10_get_dig_frontend,
+       .get_dig_mode = dcn10_get_dig_mode,
        .destroy = dcn10_link_encoder_destroy
 };
 
        AUX_REG_UPDATE(AUX_DPHY_RX_CONTROL0,
                        AUX_RX_RECEIVE_WINDOW, 0);
 }
+
+enum signal_type dcn10_get_dig_mode(
+       struct link_encoder *enc)
+{
+       struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
+       uint32_t value;
+       REG_GET(DIG_BE_CNTL, DIG_MODE, &value);
+       switch (value) {
+       case 1:
+               return SIGNAL_TYPE_DISPLAY_PORT;
+       case 2:
+               return SIGNAL_TYPE_DVI_SINGLE_LINK;
+       case 3:
+               return SIGNAL_TYPE_HDMI_TYPE_A;
+       case 5:
+               return SIGNAL_TYPE_DISPLAY_PORT_MST;
+       default:
+               return SIGNAL_TYPE_NONE;
+       }
+       return SIGNAL_TYPE_NONE;
+}
+
 
        .fec_set_enable = enc2_fec_set_enable,
        .fec_set_ready = enc2_fec_set_ready,
        .fec_is_active = enc2_fec_is_active,
+       .get_dig_mode = dcn10_get_dig_mode,
        .get_dig_frontend = dcn10_get_dig_frontend,
 };
 
 
        bool (*fec_is_active)(struct link_encoder *enc);
 #endif
        bool (*is_in_alt_mode) (struct link_encoder *enc);
+       enum signal_type (*get_dig_mode)(
+               struct link_encoder *enc);
 };
 
 #endif /* LINK_ENCODER_H_ */