memory: tegra: Sort tegra210_swgroups by reg address

Cleanup the list of swgroups (ordering by register address) to prepare
for new ones.

Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20201008003746.25659-4-nicoleotsuka@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c
index e8a7d266802c703d2f51f59fd24aa63530e76aaf..b400802c9f1403f82fd05c787e832eff4eeef571 100644 (file)
--- a/drivers/memory/tegra/tegra210.c
+++ b/drivers/memory/tegra/tegra210.c
@@ -1020,32 +1020,32 @@ static const struct tegra_mc_client tegra210_mc_clients[] = {
 };
 
 static const struct tegra_smmu_swgroup tegra210_swgroups[] = {
-       { .name = "dc",        .swgroup = TEGRA_SWGROUP_DC,        .reg = 0x240 },
-       { .name = "dcb",       .swgroup = TEGRA_SWGROUP_DCB,       .reg = 0x244 },
        { .name = "afi",       .swgroup = TEGRA_SWGROUP_AFI,       .reg = 0x238 },
        { .name = "avpc",      .swgroup = TEGRA_SWGROUP_AVPC,      .reg = 0x23c },
-       { .name = "hda",       .swgroup = TEGRA_SWGROUP_HDA,       .reg = 0x254 },
+       { .name = "dc",        .swgroup = TEGRA_SWGROUP_DC,        .reg = 0x240 },
+       { .name = "dcb",       .swgroup = TEGRA_SWGROUP_DCB,       .reg = 0x244 },
        { .name = "hc",        .swgroup = TEGRA_SWGROUP_HC,        .reg = 0x250 },
+       { .name = "hda",       .swgroup = TEGRA_SWGROUP_HDA,       .reg = 0x254 },
+       { .name = "isp2",      .swgroup = TEGRA_SWGROUP_ISP2,      .reg = 0x258 },
        { .name = "nvenc",     .swgroup = TEGRA_SWGROUP_NVENC,     .reg = 0x264 },
        { .name = "ppcs",      .swgroup = TEGRA_SWGROUP_PPCS,      .reg = 0x270 },
        { .name = "sata",      .swgroup = TEGRA_SWGROUP_SATA,      .reg = 0x274 },
-       { .name = "isp2",      .swgroup = TEGRA_SWGROUP_ISP2,      .reg = 0x258 },
+       { .name = "vi",        .swgroup = TEGRA_SWGROUP_VI,        .reg = 0x280 },
+       { .name = "vic",       .swgroup = TEGRA_SWGROUP_VIC,       .reg = 0x284 },
        { .name = "xusb_host", .swgroup = TEGRA_SWGROUP_XUSB_HOST, .reg = 0x288 },
        { .name = "xusb_dev",  .swgroup = TEGRA_SWGROUP_XUSB_DEV,  .reg = 0x28c },
-       { .name = "isp2b",     .swgroup = TEGRA_SWGROUP_ISP2B,     .reg = 0xaa4 },
-       { .name = "tsec",      .swgroup = TEGRA_SWGROUP_TSEC,      .reg = 0x294 },
        { .name = "a9avp",     .swgroup = TEGRA_SWGROUP_A9AVP,     .reg = 0x290 },
-       { .name = "gpu",       .swgroup = TEGRA_SWGROUP_GPU,       .reg = 0xaac },
+       { .name = "tsec",      .swgroup = TEGRA_SWGROUP_TSEC,      .reg = 0x294 },
        { .name = "sdmmc1a",   .swgroup = TEGRA_SWGROUP_SDMMC1A,   .reg = 0xa94 },
        { .name = "sdmmc2a",   .swgroup = TEGRA_SWGROUP_SDMMC2A,   .reg = 0xa98 },
        { .name = "sdmmc3a",   .swgroup = TEGRA_SWGROUP_SDMMC3A,   .reg = 0xa9c },
        { .name = "sdmmc4a",   .swgroup = TEGRA_SWGROUP_SDMMC4A,   .reg = 0xaa0 },
-       { .name = "vic",       .swgroup = TEGRA_SWGROUP_VIC,       .reg = 0x284 },
-       { .name = "vi",        .swgroup = TEGRA_SWGROUP_VI,        .reg = 0x280 },
+       { .name = "isp2b",     .swgroup = TEGRA_SWGROUP_ISP2B,     .reg = 0xaa4 },
+       { .name = "gpu",       .swgroup = TEGRA_SWGROUP_GPU,       .reg = 0xaac },
        { .name = "nvdec",     .swgroup = TEGRA_SWGROUP_NVDEC,     .reg = 0xab4 },
        { .name = "ape",       .swgroup = TEGRA_SWGROUP_APE,       .reg = 0xab8 },
-       { .name = "nvjpg",     .swgroup = TEGRA_SWGROUP_NVJPG,     .reg = 0xac0 },
        { .name = "se",        .swgroup = TEGRA_SWGROUP_SE,        .reg = 0xabc },
+       { .name = "nvjpg",     .swgroup = TEGRA_SWGROUP_NVJPG,     .reg = 0xac0 },
        { .name = "axiap",     .swgroup = TEGRA_SWGROUP_AXIAP,     .reg = 0xacc },
        { .name = "etr",       .swgroup = TEGRA_SWGROUP_ETR,       .reg = 0xad0 },
        { .name = "tsecb",     .swgroup = TEGRA_SWGROUP_TSECB,     .reg = 0xad4 },