drm/i915: Use intel_de_wait_for_*() in cnl+ cdclk programming
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 30 Apr 2021 15:34:44 +0000 (18:34 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 5 May 2021 18:14:12 +0000 (21:14 +0300)
Replace the hand rolled PLL lock bit waits with intel_de_wait_for_*().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210430153444.29270-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_cdclk.c

index b7d4aa2d729783ecc3e0dc305ac38d1a094f6bd7..25ef077dc3896cd562430dbde9798d8b9f3c1b6a 100644 (file)
@@ -1493,9 +1493,8 @@ static void cnl_cdclk_pll_disable(struct drm_i915_private *dev_priv)
                     BXT_DE_PLL_PLL_ENABLE, 0);
 
        /* Timeout 200us */
-       if (wait_for((intel_de_read(dev_priv, BXT_DE_PLL_ENABLE) & BXT_DE_PLL_LOCK) == 0, 1))
-               drm_err(&dev_priv->drm,
-                       "timeout waiting for CDCLK PLL unlock\n");
+       if (intel_de_wait_for_clear(dev_priv, BXT_DE_PLL_ENABLE, BXT_DE_PLL_LOCK, 1))
+               drm_err(&dev_priv->drm, "timeout waiting for CDCLK PLL unlock\n");
 
        dev_priv->cdclk.hw.vco = 0;
 }
@@ -1512,9 +1511,8 @@ static void cnl_cdclk_pll_enable(struct drm_i915_private *dev_priv, int vco)
        intel_de_write(dev_priv, BXT_DE_PLL_ENABLE, val);
 
        /* Timeout 200us */
-       if (wait_for((intel_de_read(dev_priv, BXT_DE_PLL_ENABLE) & BXT_DE_PLL_LOCK) != 0, 1))
-               drm_err(&dev_priv->drm,
-                       "timeout waiting for CDCLK PLL lock\n");
+       if (intel_de_wait_for_set(dev_priv, BXT_DE_PLL_ENABLE, BXT_DE_PLL_LOCK, 1))
+               drm_err(&dev_priv->drm, "timeout waiting for CDCLK PLL lock\n");
 
        dev_priv->cdclk.hw.vco = vco;
 }