arm64: dts: ti: k3: Fixup remaining pin group node names for make dtbs checks
authorNishanth Menon <nm@ti.com>
Wed, 2 Aug 2023 04:03:47 +0000 (23:03 -0500)
committerNishanth Menon <nm@ti.com>
Sat, 5 Aug 2023 18:14:23 +0000 (13:14 -0500)
Fix up outstanding pingroup node names to be compliant with the
upcoming pinctrl-single schema.

Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230802040347.2264339-1-nm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts
arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi
arch/arm64/boot/dts/ti/k3-am654-base-board.dts
arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts

index 7c1402b0fa2dbc2fe38a6de3631d214fb29ad961..e07ddff22e07b690277da4650c57c29b51000422 100644 (file)
                >;
        };
 
-       gbe_pmx_obsclk: gbe-pmx-clk-default {
+       gbe_pmx_obsclk: gbe-pmx-obsclk-default-pins {
                pinctrl-single,pins = <
                        AM62X_MCU_IOPAD(0x0004, PIN_OUTPUT, 1) /* (B8) MCU_SPI0_CS1.MCU_OBSCLK0 */
                >;
index e73458ca69007d181867dbfcf9bb7cc93f488def..e9419c4fe605c50cd24b7801eb6ce5f4ae9b6161 100644 (file)
@@ -10,7 +10,7 @@
  */
 
 &main_pmx0 {
-       cp2102n_reset_pin_default: cp2102n-reset-pin-default {
+       cp2102n_reset_pin_default: cp2102n-reset-default-pins {
                pinctrl-single,pins = <
                        /* (AF12) GPIO1_24, used as cp2102 reset */
                        AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7)
index 973a89b04a22f0980f800b0e1dbae628679d877f..734b051c97000dfdf1954de3c6534ea2ec46c621 100644 (file)
                >;
        };
 
-       wkup_pca554_default: wkup-pca554-default {
+       wkup_pca554_default: wkup-pca554-default-pins {
                pinctrl-single,pins = <
                        AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
                >;
index cbe44634914fdb01ae4bd59ef43cb4103ba0af15..774eb14ac907d2c3793cfa72f870364f0b1ba3b8 100644 (file)
@@ -33,7 +33,7 @@
                >;
        };
 
-       main_bkey_pcie_reset: main-bkey-pcie-reset {
+       main_bkey_pcie_reset: main-bkey-pcie-reset-default-pins {
                pinctrl-single,pins = <
                        AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7)  /* (AG13) GPIO1_15 */
                >;
@@ -46,7 +46,7 @@
                >;
        };
 
-       main_m2_pcie_mux_control: main-m2-pcie-mux-control {
+       main_m2_pcie_mux_control: main-m2-pcie-mux-control-default-pins {
                pinctrl-single,pins = <
                        AM65X_IOPAD(0x0148, PIN_INPUT_PULLUP, 7)  /* (AG22) GPIO0_82 */
                        AM65X_IOPAD(0x0160, PIN_INPUT_PULLUP, 7)  /* (AE20) GPIO0_88 */
index 21ad49cfa7eeddaf8878dda2a55c82f7ed9d4261..a8172ba55f4b6ff2ad97b02be2f5df048adb827b 100644 (file)
                >;
        };
 
-       mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-pins0-default {
+       mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 {
                pinctrl-single,pins = <
                        J721S2_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */
                        J721S2_WKUP_IOPAD(0x05C, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */
 };
 
 &wkup_pmx3 {
-       mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-pins1-default {
+       mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-default-pins-1 {
                pinctrl-single,pins = <
                        J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */
                >;