rtl8xxxu: Use lower tx rates for the ack packet
authorChris Chiu <chris.chiu@canonical.com>
Fri, 1 Oct 2021 04:00:44 +0000 (12:00 +0800)
committerKalle Valo <kvalo@codeaurora.org>
Tue, 5 Oct 2021 05:33:05 +0000 (08:33 +0300)
According to the Realtek propritary driver and the rtw88 driver, the
tx rates of the ack (includes block ack) are initialized with lower
tx rates (no HT rates) which is set by the RRSR register value. In
real cases, ack rate higher than current tx rate could lead to
difficulty for the receiving end to receive management/control frames.
The retransmission rate would be higher then expected when the driver
is acting as receiver and the RSSI is not good.

Cross out higer rates for ack packet before implementing dynamic rrsr
configuration like the commit 4830872685f8 ("rtw88: add dynamic rrsr
configuration").

Signed-off-by: Chris Chiu <chris.chiu@canonical.com>
Acked-by: Jes Sorensen <Jes.Sorensen@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20211001040044.1028708-1-chris.chiu@canonical.com
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h

index 774341b0005a3c41c8d3eb39d44b1fecc52e1053..a42e2081b75f3b520832c12903381f490955ec43 100644 (file)
@@ -4460,13 +4460,17 @@ void rtl8xxxu_gen1_init_aggregation(struct rtl8xxxu_priv *priv)
 
 static void rtl8xxxu_set_basic_rates(struct rtl8xxxu_priv *priv, u32 rate_cfg)
 {
+       struct ieee80211_hw *hw = priv->hw;
        u32 val32;
        u8 rate_idx = 0;
 
        rate_cfg &= RESPONSE_RATE_BITMAP_ALL;
 
        val32 = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET);
-       val32 &= ~RESPONSE_RATE_BITMAP_ALL;
+       if (hw->conf.chandef.chan->band == NL80211_BAND_5GHZ)
+               val32 &= RESPONSE_RATE_RRSR_INIT_5G;
+       else
+               val32 &= RESPONSE_RATE_RRSR_INIT_2G;
        val32 |= rate_cfg;
        rtl8xxxu_write32(priv, REG_RESPONSE_RATE_SET, val32);
 
index a2a31f374a82021bacd32f8ace02da6b4096db2c..438b65ba96405ccd48decf12fb78fbff8db95539 100644 (file)
 #define REG_RESPONSE_RATE_SET          0x0440
 #define  RESPONSE_RATE_BITMAP_ALL      0xfffff
 #define  RESPONSE_RATE_RRSR_CCK_ONLY_1M        0xffff1
+#define  RESPONSE_RATE_RRSR_INIT_2G    0x15f
+#define  RESPONSE_RATE_RRSR_INIT_5G    0x150
 #define  RSR_1M                                BIT(0)
 #define  RSR_2M                                BIT(1)
 #define  RSR_5_5M                      BIT(2)