projects / linux.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 41d01f5)
clk: qcom: mmcc-apq8084: remove spdm clocks
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 11 Jan 2023 06:04:00 +0000 (08:04 +0200)
committerBjorn Andersson <andersson@kernel.org>
Thu, 19 Jan 2023 00:27:35 +0000 (18:27 -0600)
SPDM is used for debug/profiling and does not have any other
functionality. These clocks can safely be removed.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Suggested-by: Georgi Djakov <djakov@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111060402.1168726-11-dmitry.baryshkov@linaro.org
drivers/clk/qcom/mmcc-apq8084.c patch | blob | history

diff --git a/drivers/clk/qcom/mmcc-apq8084.c b/drivers/clk/qcom/mmcc-apq8084.c
index fee7c767132d0aa31f4fbbd3f9763d480c6ba9e4..631b1ff8cf010cb800f7a607b4f11d793eb49484 100644 (file)
--- a/drivers/clk/qcom/mmcc-apq8084.c
+++ b/drivers/clk/qcom/mmcc-apq8084.c
@@ -2364,262 +2364,6 @@ static struct clk_branch mmss_rbcpr_clk = {
        },
 };
 
-static struct clk_branch mmss_spdm_ahb_clk = {
-       .halt_reg = 0x0230,
-       .clkr = {
-               .enable_reg = 0x0230,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_ahb_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_ahb_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_axi_clk = {
-       .halt_reg = 0x0210,
-       .clkr = {
-               .enable_reg = 0x0210,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_axi_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_axi_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_csi0_clk = {
-       .halt_reg = 0x023c,
-       .clkr = {
-               .enable_reg = 0x023c,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_csi0_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_csi0_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_gfx3d_clk = {
-       .halt_reg = 0x022c,
-       .clkr = {
-               .enable_reg = 0x022c,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_gfx3d_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_gfx3d_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_jpeg0_clk = {
-       .halt_reg = 0x0204,
-       .clkr = {
-               .enable_reg = 0x0204,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_jpeg0_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_jpeg0_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_jpeg1_clk = {
-       .halt_reg = 0x0208,
-       .clkr = {
-               .enable_reg = 0x0208,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_jpeg1_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_jpeg1_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_jpeg2_clk = {
-       .halt_reg = 0x0224,
-       .clkr = {
-               .enable_reg = 0x0224,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_jpeg2_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_jpeg2_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_mdp_clk = {
-       .halt_reg = 0x020c,
-       .clkr = {
-               .enable_reg = 0x020c,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_mdp_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_mdp_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_pclk0_clk = {
-       .halt_reg = 0x0234,
-       .clkr = {
-               .enable_reg = 0x0234,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_pclk0_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_pclk0_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_pclk1_clk = {
-       .halt_reg = 0x0228,
-       .clkr = {
-               .enable_reg = 0x0228,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_pclk1_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_pclk1_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_vcodec0_clk = {
-       .halt_reg = 0x0214,
-       .clkr = {
-               .enable_reg = 0x0214,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_vcodec0_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_vcodec0_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_vfe0_clk = {
-       .halt_reg = 0x0218,
-       .clkr = {
-               .enable_reg = 0x0218,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_vfe0_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_vfe0_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_vfe1_clk = {
-       .halt_reg = 0x021c,
-       .clkr = {
-               .enable_reg = 0x021c,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_vfe1_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_spdm_vfe1_div_clk",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_rm_axi_clk = {
-       .halt_reg = 0x0304,
-       .clkr = {
-               .enable_reg = 0x0304,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_rm_axi_clk",
-                       .parent_names = (const char *[]){
-                               "mmss_axi_clk_src",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-static struct clk_branch mmss_spdm_rm_ocmemnoc_clk = {
-       .halt_reg = 0x0308,
-       .clkr = {
-               .enable_reg = 0x0308,
-               .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
-                       .name = "mmss_spdm_rm_ocmemnoc_clk",
-                       .parent_names = (const char *[]){
-                               "ocmemnoc_clk_src",
-                       },
-                       .num_parents = 1,
-                       .flags = CLK_SET_RATE_PARENT,
-                       .ops = &clk_branch2_ops,
-               },
-       },
-};
-
-
 static struct clk_branch mmss_misc_ahb_clk = {
        .halt_reg = 0x502c,
        .clkr = {
@@ -3252,21 +2996,6 @@ static struct clk_regmap *mmcc_apq8084_clocks[] = {
        [MDSS_VSYNC_CLK] = &mdss_vsync_clk.clkr,
        [MMSS_RBCPR_AHB_CLK] = &mmss_rbcpr_ahb_clk.clkr,
        [MMSS_RBCPR_CLK] = &mmss_rbcpr_clk.clkr,
-       [MMSS_SPDM_AHB_CLK] = &mmss_spdm_ahb_clk.clkr,
-       [MMSS_SPDM_AXI_CLK] = &mmss_spdm_axi_clk.clkr,
-       [MMSS_SPDM_CSI0_CLK] = &mmss_spdm_csi0_clk.clkr,
-       [MMSS_SPDM_GFX3D_CLK] = &mmss_spdm_gfx3d_clk.clkr,
-       [MMSS_SPDM_JPEG0_CLK] = &mmss_spdm_jpeg0_clk.clkr,
-       [MMSS_SPDM_JPEG1_CLK] = &mmss_spdm_jpeg1_clk.clkr,
-       [MMSS_SPDM_JPEG2_CLK] = &mmss_spdm_jpeg2_clk.clkr,
-       [MMSS_SPDM_MDP_CLK] = &mmss_spdm_mdp_clk.clkr,
-       [MMSS_SPDM_PCLK0_CLK] = &mmss_spdm_pclk0_clk.clkr,
-       [MMSS_SPDM_PCLK1_CLK] = &mmss_spdm_pclk1_clk.clkr,
-       [MMSS_SPDM_VCODEC0_CLK] = &mmss_spdm_vcodec0_clk.clkr,
-       [MMSS_SPDM_VFE0_CLK] = &mmss_spdm_vfe0_clk.clkr,
-       [MMSS_SPDM_VFE1_CLK] = &mmss_spdm_vfe1_clk.clkr,
-       [MMSS_SPDM_RM_AXI_CLK] = &mmss_spdm_rm_axi_clk.clkr,
-       [MMSS_SPDM_RM_OCMEMNOC_CLK] = &mmss_spdm_rm_ocmemnoc_clk.clkr,
        [MMSS_MISC_AHB_CLK] = &mmss_misc_ahb_clk.clkr,
        [MMSS_MMSSNOC_AHB_CLK] = &mmss_mmssnoc_ahb_clk.clkr,
        [MMSS_MMSSNOC_BTO_AHB_CLK] = &mmss_mmssnoc_bto_ahb_clk.clkr,
ep93xx device tree rework repo: git://git.maquefel.me/linux.git